2 address bus we saw that every storage location in

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Unformatted text preview: llel and has an associated control scheme. The bus width is defined as the number of parallel lines (wires) in the bus. Every computer system has the following three types of buses for interconnecting the CPU and memory: 1. Data Bus. The data bus is used to transfer data between the CPU and memory. The one that you hear the most about is the data bus. Hence when people refer to the bus of a computer system, they usually mean the data bus. The bus width of the data bus is an important parameter that affects the overall speed of a computer system. This is because each wire of a bus can transfer one bit at a time. Hence an 8-bit bus (one having 8 parallel wires) can move 8 bits (one byte) at a time, a 16-bit bus can transfer two bytes, and a 32-bit bus can transfer four bytes at a time. This is similar to a multi-lane highway. The wider the highway, the more traffic can flow simultaneously. Similarly, a wider data bus enables more bits of data to travel simultaneously resulting in faster exchange of data. 2. Address Bus. We saw that every storage location in the memory has a unique address. The address of a location does not change, but the data stored in it can change. In order to retrieve some data from memory, it is necessary to specify the address of the location where the data is stored. The address bus is used to carry the address of a memory location whenever data is to be transferred to or from memory. Obviously, the width of the address bus must be equal to the number of bits in the memory address register (MAR) of the system. The width of the address bus is an important parameter for a computer system because it determines the maximum number of memory locations that the computer system can have. For example, if the address bus was only 8 bits wide, the CPU could address only 256 bytes of memory. Most of early personal computers had 20-bit wide address buses, so the CPU could address 2 20 bytes, or 1 MB, of memory. Today, most systems have 32-bit wide address buses t...
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