Cisc and risc processors the cpus of earlier

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Unformatted text preview: ting Point Operations Per Second) or GFLOPS (gigaflops which refers to a billion FLOPS). This is because personal computers generally employ a single microprocessor chip as their CPU, but the other classes of computers often employ multiple processors to speed up their overall performance. Thus a workstation, minicomputer, or mainframe having a speed of 500-MIPS can execute 500 million instructions per second. Similarly, a supercomputer having a speed of 100-GFLOPS.can execute 100 billion floating point operations per second. The speed of supercomputers is measured in terms of FLOPS because supercomputer applications, which are often scientific, frequently involve floating point operations. Floating point operations deal with very small or very large numbers, which require very high precision data processing. CISC and RISC Processors The CPUs of earlier computers had small instruction sets, as it was difficult and expensive to build complex hardware circuits. However, the scenario changed with the advent of integrated circuits when it became inexpensive and easy to build complex hardware circuits. One of the earlier goals of CPU designers was to provide more and more instructions in the instruction set of a CPU to ensure that the CPU directly supports more features making it easier to translate high-level language programs to machine language and to ensure that the machine language programs run more effectively. Of course, every additional instruction in the instruction set of a CPU requires the necessary hardware circuitry to handle that instruction, adding more complexity to the CPU's hardware circuitry. Another goal of CPU designers was to optimize the usage of expensive memory. To achieve this, the designers tried to pack more instructions in memory by introducing the concept of variable length instructions such as half word, one and half word, etc. For example, an operand in an immediate instruction needs fewer bits and can be designed as a half word instruction. Additionally, CPUs were designed to support a variety of addressing modes (discussed lat...
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