number_system

# That is the output of nand gate will be a 1 if any

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Unformatted text preview: known as an inverter because it inverts the input. The truth table and the block diagram symbol for a NOT gate are shown in Figure 6.23. Recall that the complementation operation is unary operation, which is defined on a single variable. Hence a NOT gate always has a single input. Figure 6.23 also shows that connecting two NOT gates in series gives an output equal to the input, and this is the gating counterpart to the law of the double complementation, A = A. Input Output A A 0 1 1 0 Figure 6.23. Block diagram symbol and truth table for (a) A NOT gate, and (b) Two NOT gates in series. NAND Gate A NAND gate is a complemented AND gate. That is, the output of NAND gate will be a 1 if any one of the inputs is a 0 and will be a 0 only when all the inputs are 1. The truth table and the block diagram symbol for a NAND gate are shown in Figure 6.24. The symbol ' T ' is usually used to represent a NAND operation in boolean expressions. Thus, A ↑ B= A • B = A + B Inputs Output A B C=A+B 0 0 1 0 1 1 1 0 1 1 1 0 Figure 6.24. Block diagram symbol and truth table for a NAND gate. The operation of a NAND gate can be analysed using the equivalent block diagram circuit shown in Figure 6.25, which has an AND gate followd by a NOT gate . For inputs A and B, the output of the AND gate will be A • B, which is fed as input to the NOT gate. Hence the complement of A • B will be A • B, which is equal to A + B or A t B. In fact, the small circle on the output of the NAND gate. Multiple-input NAND gates can be analyzed similarly. A three-input NAND gate with inputs A, B, and C will have an output equal to ABC or A + B + C, which says that the output will be a 1 if any of the inputs is a 0 and will be a 0 only when all three inputs are 1. NOR Gate A NOR gate is a complemented OR gate. That is, the output of a NOR gate will be a 1 only when all inputs are 0 and it will be a 0 if any input represents a 1. The truth table and the block diagram symbol for a NOR gate are shown in Figure 6.26. The symbol '↓' i...
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## This document was uploaded on 04/07/2014.

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