The method of circuit switching is illustrated in

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Unformatted text preview: smission takes place character by character. Hence it is cheaper to implement. However, since the transmission line is idle during the time intervals between transmitting characters, the idle time of the transmission line may be a matter of concern if the line cost is high. Even though less efficient than synchronous transmission, it is also used with devices such as printers simply to reduce cost. Synchronous mode of data transmission involves blocking a group of characters in somewhat the same way records are blocked on magnetic tape. Each block is then framed by header and trailer information. The header consists of synchronizing information, which is used by the receiving device to set its clock in synchronism with the sending end clock. The header also contains information to identify the sender and the receiver. Following the header is a block of characters that contains the actual message to be transmitted [see Figure 17.15(b)]. The number of characters in a block may be variable and may consist of hundreds of characters. The message characters in the block are terminated by a trailer. The trailer contains an end of message character followed by a check character to aid detection of any transmission error. Thus with synchronous transmission, entire blocks of characters are framed and transmitted together. Synchronous transmission is well suited to remote communication between a computer and such devices as buffered terminals and printers. Here the logical data block length would be 80 or 132 characters. It is also used for computer-tocomputer communication. The primary advantage of synchronous transmission is its efficiency. It enables the use of much higher data rates than with asynchronous transmission because it eliminates the need for individual start-stop bits on each character. The main disadvantage of synchronous transmission is the need for local buffer storage at the two ends of the line to assemble blocks and also the need for accurately synchronized clocks at both ends. As a result, synchronous equ...
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This document was uploaded on 04/07/2014.

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