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Unformatted text preview: rithmetic operation for any computer system.
Addition in binary system can be summarized by the following four rules:
0+0=0
0+1=1
1 + 0 =1
1 + 1 = 10
The first three operations produce a sum whose length is one digit, but when both augend
and addend bits are equal to 1, the binary sum consists of two digits. The higher
significant bit of this result is called a carry. When the augend and addend numbers
contain more significant digits, the carry obtained from the addition of two bits is added
to the next higher order pair of significant bits. A combinational circuit that performs the
addition of two bits is called a halfadder. One that performs the addition of three bits
(two significant bits and previous carry) is called a fulladder. The name of the former
stems from the fact that two halfadders can be employed to implement a fulladder.
Design of HalfAdder
From the definition of a halfadder, we find that this circuit needs two binary inputs and
two binary outputs. The input variables designate the augend and addend bits whereas the
output variables produce the sum and carry bits. Let A and B be the two inputs and S (for
sum) and C (for carry) be the two outputs. The truth table of Figure 6.36 exactly defines
the function of the halfadder.
Inputs
Outputs
A
0
0
1 B
0
1
0 C
0
0
0 •s
0
1
1 1
1
1
Figure 6.36. Truth table for a halfadder. 0 The simplified Boolean functions for the two outputs, directly obtained from the truth
table, are:
The logic circuit diagram to implement this is shown in Figure 6.37.
The halfadder is limited in the sense that it can add only two single bits. Although it
generates a carry for the next higher pair of significant bits, it cannot accept a carry
generated from the previous pair of lower significant bits. A fulladder solves this
problem.
Design of FullAdder
A fulladder forms the arithmetic sum of three input bits. Hence it consists of three inputs
and two outputs. Two of the input variables (A and B) represent the augend and the
addend bits and the third input variable (D) represents the carry from the previous lower
significant p...
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This document was uploaded on 04/07/2014.
 Spring '14

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