ElectronicsITest1Cahay1995

ElectronicsITest1Cahay1995 - Test 1 - Winter 1995 - M....

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Unformatted text preview: Test 1 - Winter 1995 - M. Cahay Name: m ELECTRONICS I . January 23, 1995 I. The figure below shows a voltage source connected to the input of an ampli- fier. R, is the source resistance. R.- and C.- are the input resistance and input capacitance of the amplifier, respectively. Derive an expression for V;(s)/V.(s) and show that it is a. low-pass STC type. Find the 3-dB frequency for the case where R, = 51:51, = 200169, and C,- = 20pF. (25 pts). figzstiz V k Brunch—n— cub ; ‘30; 41 L 20%“ Cf: ZOFF {wkasha LOP-F ' .eo)ooo (0‘5 “3-17. Q‘s—"°q ' as: 6H' = ~—— . e «50,000 2h" ’ I o 5; L63 H2~ 5H3 II. In the diagrambelow the op-amp is assumed to be ideal and all resistors are assumed to be equal to 10 for simplicity. Find an expression of 1);, in terms of v; and v2. Hint: Use the principle of superposition.(30f’7>) III. A designer has available voltage amplifiers having an input resistance of 101:9, an output resistance of 11:9, and an open-circuit voltage gain of 10. The signal source has a 101:9 resistance and provides 10 mV rms signal. If it is required to provide a signal of at least 2V ms to a 11:0 load, how many amplifier stages are required? For this number of amplifiers, what is the actual output voltage? ['50 in 12.0. ‘ lkn. . IV. Consider a voltage follower (buffer amplifier) built with an ideal op-amp except for having a finite voltage gain A. Calculate the value of the close- loop gain for A=10,100, and 1000. In each case calculate the % error in gain magnitude compared to the gain obtained with an ideal op-amp. ( 15 ...
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This note was uploaded on 04/09/2008 for the course ECEE 351 taught by Professor Cahay during the Fall '97 term at University of Cincinnati.

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ElectronicsITest1Cahay1995 - Test 1 - Winter 1995 - M....

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