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L41 - CS61C Machine Structures Lecture 40 x86 Architecture...

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CS61C L41 x86 Wawrzynek, Fall 2007 © UCB 12/5/2007 John Wawrzynek (www.cs.berkeley.edu/~johnw) www-inst.eecs.berkeley.edu/~cs61c/ CS61C – Machine Structures Lecture 40 - x86 Architecture 1 CS61C L41 x86 Wawrzynek, Fall 2007 © UCB Outline History of Intel x86 line. MIPS versus x86 Unusual features of x86 2
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CS61C L41 x86 Wawrzynek, Fall 2007 © UCB x86 From Wikipedia: x86 or Intel 80x86 is the generic name of an architecture of microprocessors ±rst developed and manufactured by Intel, also manufactured at various stages by AMD , Cyrix , NEC , Transmeta (that uses it in PDAs too, see Crusoe ) and sundry other makers at various stages in its nearly 25-year history. In addition to basic architecture itself, these names are also used to describe a family of particular microprocessors manufactured by Intel, including the Intel 8086 , Intel 80186 , Intel 80286 , Intel 80386 , Intel 80486 , Pentium , Pentium Pro , Pentium II , Pentium III, Pentium 4, and Pentium M, . The architecture of Intel's 32-bit x86 processors is sometimes known as IA-32 . Intel's IA-64 architecture used in its Itanium processors is related to x86, but incompatible with its instruction set . AMD's x86-64 is backward-compatible with x86. 3 CS61C L41 x86 Wawrzynek, Fall 2007 © UCB Intel History: ISA evolved since 1978 8086: 16-bit, all internal registers 16 bits wide; no general purpose registers; ʼ 78 8087: + 60 Fl. Pt. instructions, (Prof. Kahan) adds 80-bit-wide stack, but no general purpose registers; ʻ 80 8088: simpler version of 8086 adopted as standard CPU of the IBM PC; ʻ 81 80286: expands addressable memory to 16MB (from 1MB), adds elaborate protection model; ʻ 82 80386: 32-bit; converts 8 16-bit registers into 8 32-bit general purpose registers; new addressing modes; adds paging to support OS; ʻ 85 80486: + 4 instructions, risc-like pipelining, integrated FPU, on-chip cache; ʻ 89 MMX: + 57 instructions for multimedia; ʼ 93 Pentium Pro: u-op translation, integrated L2 cache; ʻ 95 Pentium 4: hyper-threading, +144 instructions for multimedia; '99 AMD extends ISA to 64 bits; ʼ 02, Intel adopts 64-bit extensions; ʼ 03 Intel Core: dual-core; ʻ 06 4
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CS61C L41 x86 Wawrzynek, Fall 2007 © UCB x86 design decisions Early x86 were designed to be hand programmed as much as compiled to • Thus, complicated instructions (e.g., string copy) which make a programmer's life easier were good Current x86 processors will translate these on the ±y Memory was very expensive • So keeping code size small was very important Registers were very expensive Backwards compatibility is king! • Thus can only add to the ISA, never take away 5 CS61C L41 x86 Wawrzynek, Fall 2007 © UCB x86 is the classic CISC architecture CISC = Complex Instruction Set Computer General characteristics: • Instructions have multiple operand types (constants, registers, memory) • Variable length instructions Instruction latency may vary heavily between
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L41 - CS61C Machine Structures Lecture 40 x86 Architecture...

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