# Using the op amp model depicted in fig 844 compute in

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Using the op amp model depicted in Fig. 8.44, compute in terms of and . 34. Consider the voltage adder illustrated in Fig. 8.56, where is a parasitic resistance and the R R X 2 out V F R 1 V 1 V 2 A 0 R P Figure 8.56 op amp exhibits a finite input impedance. With the aid of the op amp model shown in Fig. 8.43, determine in terms of and . 35. Plot the current flowing through in the precision rectifier of Fig. 8.22(b) as a function of time for a sinusoidal input. 36. Plot the current flowing through in the precision rectifier of Fig. 8.23(a) as a function of time for a sinusoidal input. 37. Figure 8.57 shows a precision rectifier producing negative cycles. Plot , , and the R 1 X Y V out in V D 1 Figure 8.57 current flowing through as a function of time for a sinusoidal input. 38. Consider the precision rectifier depicted in Fig. 8.58, where a parasitic resistor has ap- peared in parallel with . Plot and as a function of time in response to a sinusoidal input. Use a constant-voltage model for the diode. 39. We wish to improve the speed of the rectifier shown in Fig. 8.22(b) by connecting a diode from node to ground. Explain how this can be accomplished. 40. Suppose in Fig. 8.24 varies from V to V. Sketch and as a function of if the op amp is ideal.

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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 414 (1) 414 Chap. 8 Operational Amplifier As A Black Box R 1 X Y V out in V D 1 R P Figure 8.58 41. Suppose the gain of the op amp in Fig. 8.24 is finite. Determine the input/output character- istic of the circuit. 42. A student attempts to construct a noninverting logarithmic amplifier as illustrated in Fig. 8.59. Describe the operation of this circuit. R X in V 1 out V Q 1 Figure 8.59 43. Determine the small-signal voltage gain of the logarithmic amplifier depicted in Fig. 8.24 by differentiating both sides of (8.66) with respect to . Plot the magnitude of the gain as a function of and explain why the circuit is said to provide a “compressive” characteristic. 44. The logarithmic amplifier of Fig. 8.24 must “map” an input range of 1 V to 10 V to an output range of V to V. (a) Determine the required values of and . (b) Calculate the small-signal voltage gain at the two ends of the range. 45. The circuit illustrated in Fig. 8.60 can be considered a “true” square-root amplifier. Deter- R X in V 1 out V M 1 V TH Figure 8.60 mine in terms of and compute the small-signal gain by differentiating the result with respect to . 46. Calculate in terms of for the circuit shown in Fig. 8.61. 47. In the noninverting amplifier of Fig. 8.62, the op amp offset is represented by a voltage source in series with the inverting input. Calculate . 48. Suppose each op amp in Fig. 8.28 suffers from an input offset of 3 mV. Determine the maximum offset error in if each amplifier is designed for a gain of 10.
BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 415 (1) Sec. 8.6 Chapter Summary 415 R X in V 1 out V M 1 Figure 8.61 V in A 0 out V R 1 R 2 V OS Figure 8.62 49. For the inverting amplifier illustrated in Fig. 8.63, calculate if the op amp exhibits an A 0 R 1 R 2 in V out V Figure 8.63 input offset of . Assume .

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