Q Junction temperature T J 125 C1 Group 2 pins are as follows

Q junction temperature t j 125 c1 group 2 pins are as

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Q version –40 125 Junction temperature, T J 125 °C (1) Group 2 pins are as follows: GPIO28, GPIO29, GPIO30, GPIO31, TDO, XCLKOUT, EMU0, EMU1, XINTF pins, GPIO35-87, XRD. 6.3 Electrical Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I OH = I OH MAX 2.4 V OH High-level output voltage V I OH = 50 m A V DDIO – 0.2 V OL Low-level output voltage I OL = I OL MAX 0.4 V Pin with pullup V DDIO = 3.3 V, V IN = 0 V All I/Os (including XRS) –80 –140 –190 enabled Input current I IL m A (low level) Pin with pulldown V DDIO = 3.3 V, V IN = 0 V ±2 enabled Pin with pullup V DDIO = 3.3 V, V IN = V DDIO ±2 enabled Input current I IH m A (high level) Pin with pulldown V DDIO = 3.3 V, V IN = V DDIO 28 50 80 enabled Output current, pullup or I OZ V O = V DDIO or 0 V ±2 m A pulldown disabled C I Input capacitance 2 pF Copyright © 2007–2010, Texas Instruments Incorporated Electrical Specifications 117 Submit Documentation Feedback Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234 TMS320F28232
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TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 SPRS439H–JUNE 2007–REVISED MARCH 2010 6.4 Current Consumption Table 6-1. TMS320F28335/F28235 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT I DD I DDIO (1) I DD3VFL (2) I DDA18 (3) I DDA33 (4) MODE TEST CONDITIONS TYP (5) MAX TYP (5) MAX TYP MAX TYP (5) MAX TYP (5) MAX The following peripheral clocks are enabled: ePWM1/2/3/4/5/6 eCAP1/2/3/4/5/6 eQEP1/2 eCAN-A SCI-A/B Operational (FIFO mode) 290 mA 315 mA 30 mA 50 mA 35 mA 40 mA 30 mA 35 mA 1.5 mA 2 mA (Flash) (6) SPI-A (FIFO mode) ADC I2C CPU Timer 0/1/2 All PWM pins are toggled at 150 kHz. All I/O pins are left unconnected. (7) Flash is powered down. XCLKOUT is turned off. The following peripheral clocks are enabled: IDLE 100 mA 120 mA 60 m A 120 m A 2 m A 10 m A 5 m A 60 m A 15 m A 20 m A eCAN-A SCI-A SPI-A I2C Flash is powered down. STANDBY 8 mA 15 mA 60 m A 120 m A 2 m A 10 m A 5 m A 60 m A 15 m A 20 m A Peripheral clocks are off. Flash is powered down. HALT (8) Peripheral clocks are off. 150 m A 60 m A 120 m A 2 m A 10 m A 5 m A 60 m A 15 m A 20 m A Input clock is disabled. (9) (1) I DDIO current is dependent on the electrical loading on the I/O pins. (2) The I DD3VFL current indicated in this table is the flash read-current and does not include additional current for erase/write operations. During flash programming, extra current is drawn from the V DD and V DD3VFL rails, as indicated in Table 6-67 . If the user application involves on-board flash programming, this extra current must be taken into account while architecting the power-supply stage. (3) I DDA18 includes current into V DD1A18 and V DD2A18 pins. In order to realize the I DDA18 currents shown for IDLE, STANDBY, and HALT, clock to the ADC module must be turned off explicitly by writing to the PCLKCR0 register. (4) I DDA33 includes current into V DDA2 and V DDAIO pins. (5) The TYP numbers are applicable over room temperature and nominal voltage. MAX numbers are at 125°C, and MAX voltage (V DD = 2.0 V; V DDIO , V DD3VFL , V DDA = 3.6 V).
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