NA Makes pole zero additional pole at origin NA Makes pole zero additional zero

# Na makes pole zero additional pole at origin na makes

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N/A Makes pole + zero + additional pole at origin N/A Makes pole + zero + additional zero at origin N/A Makes two poles + double zero at origin N/A

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67/92 Makes two poles N/A Makes two zeros N/A Makes pole + zero + additional zero at origin N/A Makes two zeros N/A Note that there are four possible combinations which produce potential solutions for this problem, and only two of these produce component values within acceptable ranges. Note that the one of these two (series R+C) which is covered in the notes also produces the value of closest to the desired total value (0.9 or 1, depending on if you rounded). So, let us use this as our choice of the first stage. For the second stage, the component values are not as restrictive. All four of the structurally possible options will produce valid values: Component Values Added Gain Note: Required some iteration; initial guesses give R values below limit. Could select higher L in both P/Z to get R with larger margin from lower limit of .
68/92 If we select either of the blue options, then our circuit can be complete. Note that if you decided not to round the total gain (i.e., you kept it as 0.9), then you would need to match this total gain. Using the blue-option path, this would require a resistive divider at the output to achieve the 0.9 gain; you cannot implement a gain of magnitude less than one using either op-amp amplifier. Note that one other option which is tidier if you chose to match the 0.9 gain would be to use the white option for Block 1 and either white option for Block 2. In this case, the gains multiply to (-30)(- 0.3) = 9, thus requiring only a simply 1/10 resistive divider at the output to achieve 0.9 total gain. Part (b) We can determine the following facts using only the Bode magnitude graph given to us earlier: An input sinusoid with frequency of will be attenuated by a factor of | ( )| , with unknown phase shift. An input sinusoid with frequency of will be amplifier by a factor of | ( )| Total output will roughly be: ( ) ( ) ( ) ( ) Ignoring the phase shift in the above, the magnitude of the 300 rad/s sinusoid will be at roughly 32 times the amplitude of the lower frequency sinusoid. Any sketch mainly showing the 300 rad/s sinusoid would suffice:

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69/92 Question 31. Equations Transfer Function ( ) ( ) 𝑉 ?
70/92 Question 32. Equations . / Solution Solve Equation 1 for : [ ] * . / . / + Substitute into Equation 2, and solve for : [ ] [ ] [ ] [ ] * . / . / + [ ] [ ] * . / . / + [ ] 𝑉 ?

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71/92 * . / . / + * . / . / . / . / + * . / . / + * . / + ( ) ( )
72/92 Question 33. Equations Solution ( ) 𝑉 ?

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73/92 Question 34. Equations || || ( ) Solution ( ) ( *
74/92 Question 35. Equations || || ( ) Solution ( ) ( ) ( )

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75/92 Question 36. Equations || ( ) Solution ( ) ( )
76/92 Question 37. Equations ( ) Solution ( )

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77/92 Question 38. Equations || || Solution ( ) ( , -, - * 𝑅 𝑅 𝑅 𝑅 ? ?
78/92 Question 39. Equations Solution ( ) ( )

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79/92 Question 40. Part (a) To begin, we can write two node equations for the circuit. Since we assume the op-amp is operating in amplifier mode, we can write for the op-amp. We label the other unknown node : Equation 1 ( * ( * ( * [ ] [ ] , - , - , - , - Equation 2 ( * Substituting in Equation 2 into Equation 1: ( * , - , - , - , - , - , - ( ) ( ) ( ) . / . / . / Note that either the last or second last line is acceptable in terms of simplification.
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