216 power distribution there are two ways in which

2.1.6 Power distribution
There are two ways in which the board can get its main power
supply (3.3V) when it is plugged into the VME crate:
 Directly from the VME backplane.
 Getting 5V from the VME back plane and converting this
voltage into 3.3V with a DC/DC converter (PT5801).
Furthermore, an ADP3330-2.5 DC/DC voltage converter is used to
get the 2.5V voltage needed for the VME-FPGA from the +5V backplane
supply.
In addition, the ±12V and ±5V lines in the VME backplane are
used by the trigger/busy logic.
Finally there are two +5V and GND connectors to be used with
an external power supply for debugging tasks. It is possible to select the
power supply mode by placing a fuse in one of two fuse holders (labeled
as VME FUSE and CONVERTER FUSE). It is very important not to
place the two fuses simultaneously. VME FUSE must be placed to get
power from the VME bus (board plugged in the crate) whereas
CONVERTER FUSE must be placed to get power from the external
supply.
2.1.7 Data distribution
There are two different functioning modes in the OMB: CRC
processing mode and data injection mode. Figure 3 shows the data
distribution in the CRC mode. Two connectors receive the data and
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route them to the CRC-FPGA. Then, the CRC is checked and the
decision is taken on which data is send to the ROD. Every time a CRC
error is detected it is communicated to the VME-FPGA and the error
counter is incremented. The values of these error counters can be read
out in real time through the VME bus.
Figure 3: Data distribution in CRC mode.
Figure 4 shows the data distribution in the data injection mode in
which the optical receivers are not used. There are two different
injection modes:
 Counter mode: The events have all words with the same value
and this value is incremented with each event sent.
 Memory injection mode: The events sent are previously stored
in the internal memory.
In both cases the events are sent every time a trigger is received
in the CRC_FPGA either by the external LEMO connector in the front
panel or by VME. We will describe these data injection modes in more
detail in section 3.1.1.
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Figure 4: Data distribution in Injector mode.
2.1.8 Trigger and busy handling
The trigger signals used to select the injection rate can be
generated either from an external source or they be generated
internally in the VME FPGA. If the external mode is selected the trigger
is received by the OMB through a lemo connector placed in the front
panel which is connected directly to each CRC-FPGA. Both trigger
modes and other specifications about trigger operation modes will be
completely described in section 3.1.2.
The busy lemo connector can receive an input signal that can be
used to receive a busy signal from the Trigger and Busy Module (TBM)
to stop the data injection if at least one ROD is in busy state [10]. The
busy lemo connector is directly connected to each CRC-FPGA and to the
VME-FPGA.