Timercounter 0 high byte 8ch tl0 timercounter 0 low

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Timer/counter 0 high byte 8CH TL0 Timer/counter 0 low byte 8AH TH1 Timer/counter 1 high byte 8DH TL1 Timer/counter 1 low byte 8BH TH2 Timer/counter 2 high byte 0CDH TL2 Timer/counter 2 low byte 0CCH RCAP2H T/C 2 capture register high byte 0CBH RCAP2L T/C 2 capture register low byte 0CAH SCON* Serial control 98H SBUF Serial data buffer 99H PCON Power control 87H *bit addressable (discussed further in Chapter 8)
26 ACC and Its Address ACC has SFR address 0E0H. 1 0000 75 E0 55 MOV 0E0H,#55H 2 0003 74 55 MOV A,#55H 3 0005 D2 E1 SETB A.1 Compare their code size and execution time. “ACC ” , ( means this register is bit addressable. You can access each bit of ACC independently. A.6 A.5 A.4 A.3 A.2 A.1 A.7 A.0 ACC SFC addr. 0E7 0E6 0E5 0E4 0E3 0E2 0E1 0E0
27 Example 5-1 Write code to send 55H to ports P1 and P2, using (a) their names (b) their addresses. Solution:
28 Stack Another major use of direct addressing mode is the stack. In the 8051 family, only direct addressing mode is allowed for pushing onto the stack.
Example 5-2 ( 1/2 ( Show the code to push R5, R6, and A onto the stack and then pop them back them into R2, R3, and B. We want ( B = A, R2 = R6, and R3 = R5.
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30 Example 5-2 ( 1/2 ( Different assembler provide different instruction for the stack. In our simulation tools, they are the same ( 1 0000 C0 05 PUSH R5 2 0002 C0 06 PUSH R6 3 0004 C0 E0 PUSH A 1 0000 C0 05 PUSH 05 2 0002 C0 06 PUSH 06 3 0004 C0 E0 PUSH 0E0H
31 Addressing Mode 4 1. immediate ( the operand is a constant MOV A,#01FH 2. register ( the operand is in a register MOV A,R0 3. direct ( access the data in the RAM with address MOV A,01FH 4. register indirect ( the register holds the RAM address of the data MOV A,@R0 5. indexed ( for on-chip ROM access
32 Register Indirect Addressing Mode In the register indirect addressing mode, a register is used as a pointer to the data. That is, this register holds the RAM address of the data. Only registers R0 and R1 can be used to hold the address of an operand located in RA. Usually, R0 and R1 are denoted by Ri. When R0 and R1 hold the addresses of RAM locations, they must be preceded by the “@” sign.
33 Example of Register Indirect Mode ( 1/2 ( Register Indirect Mode ( 1 0000 75 20 64 MOV 20H,#100 2 0003 78 20 MOV R0,#20H 3 0005 E6 MOV A,@R0 R0 20H A 64H RAM 1E 00 1F 00 20 64 21 00 22 00 23 : 1. put 64H to addr. 20H 2. let R0 be the data address 3. copy the content in addr. R0=20H to A
34 Example of Register Indirect Mode ( 2/2 ( Register Indirect Mode ( 1 0000 75 F0 80 MOV B,#080H 2 0003 79 31 MOV R1,#31H 3 0005 A7 F0 MOV @R1,B R1 31H B 80H RAM 2F 00 30 00 31 80 32 00 33 00 34 : 1. let B=80H 2. let R0 be the data address 3. copy B to the RAM location with addr. R1=31H
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