However if the number of erroneous bits is grater than the minimum distance

However if the number of erroneous bits is grater

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of distorted bits is less than a minimum distance of the code. However, if the number of erroneous bits is grater than the minimum distance, detection probabilities for different
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patterns of distorted bits are either 0 or 1. For communication channels or memory, a “natural” distortion of a single bit in a message is more likely to occur than a distortion of two or more bits, and the usage of linear error-detecting codes is justified. However, in the case of a device under attack (it could be jamming or extreme environment conditions: e.g. lightning) multiple errors may be as probable as single ones. The robust encoding technique [8] provides an equal error-detecting capability for all patterns of erroneous symbols with moderate redundancy of the code (and hardware) and high probability of error detection. The last two parameters become as better as longer become code-words - that is very important for cryptographic applications (e.g. for a codeword of 1024 bits, to detect any error with probability of mistake 2 -32 , we would need only 64- redundant bits or 6.25% code redundancy) [9]. The application of robust encoding techniques could be easily combined with the asynchronous pipelined implementation of encoders, decoders and related circuitry. Recently, the first attempt was made to use some of asynchronous design methodology to protect smart cards [11]. However, it is rather far away from a complete methodology. Our approach is different from [11] in two major points: (1) We use a fine-grain pipelining together with a two (and three) dimensional pipeline organization to combine high performance with a very small data dependency in the duration of the operations. In [11] only traditional random delay insertion to diffuse data depending timing is considered. (2) We combine an asynchronous fine-grain pipelined implementation with the protection of memory and communication channels based on robust encoding. It does not only increase protection of portable devices against fault-injection based attacks but also protects data communications and memory against jamming. There is no attempt to protect memory and communication channels in [11]. We address a number of hardware level security and reliability issues and how asynchronous fine-grain pipelined circuits together with robust encoding techniques can be used to build more robust and secure (trusted) microchips. To summarize, we are developing a unified methodology for the design of devices inherently resistant to attacks and jamming. Such a methodology provides security and reliability of all components (computational devices, control, memory and communication) by : eliminating a data dependent power consumption and an electromagnetic emission using asynchronous dual-rail fine-grain pipelined circuit techniques defending against faults injection in a computational datapath by using a redundant encoding scheme (dual rail), the absence of clock (glitch attack becomes infeasible), and the array based implementation of multipliers defending against a fault induction and jamming in communication channels and a memory using error detection based on optimal robust codes with equal error-
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  • Spring '16
  • Cryptography, Side channel attack, Asynchronous circuit

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