EEL6323-S10-HLec03-CMOS-Layout-2spp

# 4 wiring tracks a wiring track is the space required

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Unformatted text preview: 4 Wiring Tracks • A wiring track is the space required for a wire – 4 width, 4 spacing from neighbor = 8 pitch • Transistors also consume one wiring track • Estimate area by counting wiring tracks Stick Diagrams • Stick diagrams help plan layout quickly – Need not be to scale – Draw with color pencils or dry-erase markers 5 Example: O3AI • Sketch a stick diagram for O3AI and estimate area – Y A B C D ¡ Optimal POLY Ordering • Define Euler path – Uninterrupted path that traverses each edge of the graph EXACTLY ONCE • Find Euler path in PDN graph below starting at x. . x 6 Optimal Input (POLY) Ordering • Common Euler path in both PDN graph and PUN graph gives optimal ordering of POLY input lines • What is the order of inputs for the common Euler paths? Example • Determine the graph for the PDN and PUN for • Find the Euler path . A B C D E F F = (A + BC + D)(E + F) 7 C B A E F D GND VDD F C B D F E A GND VDD F Stick Diagram Design Partitioning • Architecture : Describes the functions in the system – Instruction set, registers, MIPS, x86, Alpha, PIC, ARM, … • Microarchitecture: Describes how architecture is partitioned into registers and functional units – Single cycle, multcycle, pipelined, superscalar?– Single cycle, multcycle, pipelined, superscalar?...
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• Fall '09
• Guan
• Central processing unit, Processor register, Standard cell, I/O pads, wiring tracks

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