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# Suppose that the adder substractor circuit has been

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15. Suppose that the adder-substractor circuit has been designed for twos-complement numbers. It computes the sum Z = X + Y when control line SUB = 0 and the difference Z = X – Y when SUB = 1. An overflow flag v is to be added to the circuit, but it is not possible to access internal lines. In other words, only those data and control lines can be used to compute v. Construct a suitable logic circuit for v. (15-marks) Solution:

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16. Consider the adder-substractor , assuming that it has been designed for sign- magnitude numbers. It computes the sum Z = X + Y when control line SUB = 0 and the difference Z = X – Y when SUB = 1. Assume that the circuit contains an n-bit ripple-carry adder and a similar n-bit ripple-borrow substractor and that you have access to all internal lines. Derive a logic equation that defines an overflow flag v for this circuit. (10-marks) Solution:
17. Show how to extend the 16-bit designto a 64-bit adder using the same two component types: a 4-bit adder module and a 4-bit carry-lookahead generator. Solution: (10-marks)

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18. Use the multiplier cell to construct a combinational array multiplier for 5-bit unsigned numbers. Draw a logic diagram for the multiplier and show all the signals (including constant signals) applied to every cell. (15-marks) Solution:
19. Suppose the register file RF 16 is to be built out of four identical 4-bit slices denoted RF 4 . (a) Give a register-level diagram showing the internal structure of RF4. (b) Show how four copies of RF 4 are interconnected to form RF 16 . (15-marks) Solution:

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20.Procedure gcd shown in figure is an HDL description to compute the greatest common division os two numbers. Design the gcd processor and construct a Moore- type state table defining the control unit gcd processor, an excitation table, logic equations and a complete logic circuit that uses D flip-flops and NAND gates only.(Hint: Use classical method) (20-marks) gcd (in:x,y;out:z) register XR, YR, TEMPR; XR := x; YR := y;(input the data) while XR>0 do begin if XR<=YR then begin (swap XR and YR) TEMPR := YR; XR := TEMPR; end XR := XR – YR; (subtract YR from XR ) end z := YR; (output the result) end gcd Solution: Inputs Present Next Outputs State State + + (XR>0)(XR>=YR) D 1 D 0 D 1 D 0 Sub Swap Select LoadXR LoadYR 0 d 0 0 1 1 0 0 1 1 1 0 d 0 1 1 0 0 1 0 1 1 0 d 1 0 1 1 1 0 0 1 0 0 d 1 1 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 1 0 0 1 0 1 0 1 1 1 1 0 0 0 0 0 1 1 0 0 1 0 0 0 1 1 1 1 1 0 1 1 0 0 1 0 1 1 1 1 1 0 1 0 1 0 0 1 0 1 1 1 1 1 1 0 0 0 0 0 State Inputs(XR>0)(XR>=YR) 0d 10 11 Outputs Sub Swap Select LoadXR LoadYR S 0 (Begin) S 1 (Swap) S 2 (Subtract) S 3 (End) S 3 S 1 S 2 S 2 S 2 S 2 S 3 S 1 S 2 S 3 S 3 S 3 0 0 1 1 1 0 1 0 1 1 1 0 0 1 0 0 0 0 0 0

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