# Solution from fig 827 we recognize that the first

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Solution From Fig. 8.27, we recognize that the first stage amplifies the offset by a factor of 100, generating a dc level of 200 mV at node (if the microphone produces a zero dc output). The second stage The reader can show that placing in series with the inverting input of the op amp yields the same result.

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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 395 (1) Sec. 8.4 Op Amp Nonidealities 395 10 k 100 X 10 k 100 out V A 1 A 2 Figure 8.28 Two-stage amplifier. now amplifies by another factor of 100, thereby attempting to generate V. If operates with a supply voltage of, say, 3 V, the output cannot exceed this value, the second op amp drives its transistors into saturation (for bipolar devices) or triode region (for MOSFETs), and its gain falls to a small value. We say the second stage is saturated. (The problem of offset amplification in cascaded stages can be resolved through ac coupling.) Exercise Repeat the above example if the second stage has a voltage gain of 10. DC offsets impact the inverting amplifier of Fig. 8.7(a) in a similar manner. This is studied in Problem 49. We now examine the effect of offset on the integrator of Fig. 8.10. Suppose the input is set to zero and is referred to the noninverting input [Fig. 8.29(a)]. What happens at the output? Re- call from Fig. 8.20 and Eq. (8.61) that the response to this “input” consists of the input itself [the unity term in (8.61)] and the integral of the input [the second term in (8.61)]. We can therefore express in the time domain as (8.70) (8.71) where the initial condition across is assumed zero. In other words, the circuit integrates the op amp offset, generating an output that tends to or depending on the sign of . Of course, as approaches the positive or negative supply voltages, the transistors in the op amp fail to provide gain and the output saturates [Fig. 8.29(b)]. The problem of offsets proves quite serious in integrators. Even in the presence of an input sig- nal, the circuit of Fig. 8.29(a) integrates the offset and reaches saturation. Figure 8.29(c) depicts a modification, where resistor is placed in parallel with . Now the effect of at the output is given by (8.9) because the circuits of Figs. 8.5 and 8.29(c) are similar at low frequencies: (8.72) For example, if mV and , then contains a dc error of 202 mV, but at least remains away from saturation..
BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 396 (1) 396 Chap. 8 Operational Amplifier As A Black Box V V EE CC out V C 1 R 1 V os t V CC out V out V C 1 R 1 V os R 2 out V C 1 R 1 R 2 in V (d) (c) (a) (b) Figure 8.29 (a) Offset in integrator, (b) output waveform, (c) addition of to reduce effect of offset, (d) determination of transfer function. How does affect the integration function? Disregarding , viewing the circuit as shown in Fig. 8.29(d), and using (8.27), we have (8.73) Thus, the circuit now contains a pole at rather than at the origin. If the input signal frequencies of interest lie well above this value, then and (8.74) That is, the integration function holds for input frequencies much higher than . Thus, must be sufficiently small so as to minimize the amplified offset given by (8.72) whereas

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