# Exercise repeat the above example if the gate of is

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Exercise Repeat the above example if the gate of is tied to a voltage equal to 1.5 V and V. 6.3.2 Small-Signal Model If the bias currents and voltages of a MOSFET are only slightly disturbed by signals, the nonlin- ear, large-signal models can be reduced to linear, small-signal representations. The development

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BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 307 (1) Sec. 6.3 MOS Device Models 307 of the model proceeds in a manner similar to that in Chapter 4 for bipolar devices. Of particular interest to us in this book is the small-signal model for the saturation region. Viewing the transistor as a voltage-controlled current source, we draw the basic model as in Fig. 6.31(a), where and the gate remains open. To represent channel-length modulation, i.e., variation of with , we add a resistor as in Fig. 6.31(b): G D S g m v v GS GS G S g m v v GS GS r O D (a) (b) Figure 6.31 (a) Small-signal model of MOSFET, (b) inclusion of channel-length modulation. (6.60) (6.61) Since channel-length modulation is relatively small, the denominator of (6.61) can be approxi- mated as , yielding (6.62) Example 6.14 A MOSFET is biased at a drain current of 0.5 mA. If , , and , calculate its small-signal parameters. Solution We have (6.63) (6.64) Also, (6.65) (6.66) This means that the intrinsic gain, , (Chapter 4) is equal to 20 for this choice of device dimensions and bias current. Exercise Repeat the above example if is doubled.
BR Wiley/Razavi/ Fundamentals of Microelectronics [Razavi.cls v. 2006] June 30, 2007 at 13:42 308 (1) 308 Chap. 6 Physics of MOS Transistors 6.4 PMOS Transistor Having seen both and bipolar transistors, the reader may wonder if a -type counterpart exists for MOSFETs. Indeed, as illustrated in Fig. 6.32(a), changing the doping polarities of the substrate and the S/D areas results in a “PMOS” device. The channel now consists of holes and is formed if the gate voltage is below the source potential by one threshold voltage. That is, to turn the device on, , where itself is negative. Following the conventions used for bipolar devices, we draw the PMOS device as in Fig. 6.32(b), with the source terminal identified by the arrow and placed on top to emphasize its higher potential. The transistor operates in the triode region if the drain voltage is near the source potential, approaching saturation as falls to . Figure 6.32(c) conceptually illustrates the gate-drain voltages required for each region of operation. + + substrate G D S n p p G D S I D V THP > V THP V THP < (c) (a) (b) Triode Region Edge of Saturation Saturation Region Figure 6.32 (a) Structure of PMOS device, (b) PMOS circuit symbol, (c) illustration of triode and satura- tion regions based on gate and drain voltages. Example 6.15 In the circuit of Fig. 6.33, determine the region of operation of as goes from to zero. Assume V and V. V DD 1 1 V M 1 V Figure 6.33 Simple PMOS circuit.

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