For single ended conversion the result is where V IN is the voltage on the

For single ended conversion the result is where v in

This preview shows page 256 - 259 out of 584 pages.

For single ended conversion, the result is where V IN is the voltage on the selected input pin and V REF the selected voltage reference (see Table 23-3 on page 258 and Table 23-4 on page 259 ). 0x000 represents analog ground, and 0x3FF represents the selected reference voltage minus one LSB. If differential channels are used, the result is where V POS is the voltage on the positive input pin, V NEG the voltage on the negative input pin, GAIN the selected gain factor, and V REF the selected voltage reference. The result is presented in two’s complement form, from 0x200 (-512d) through 0x1FF (+511d). Note that if the user wants to perform a quick polarity check of the results, it is sufficient to read the MSB of the result (ADC9 in ADCH). If this bit is one, the result is negative, and if this bit is zero, the result is posi- tive. Figure 23-14 on page 257 shows the decoding of the differential input range. Table 23-2 on page 257 shows the resulting output codes if the differential input channel pair (ADCn - ADCm) is selected with a gain of GAIN and a reference voltage of V REF . ADC V IN 1024 V REF -------------------------- = ADC V POS V NEG ( ) GAIN 512 V REF ------------------------------------------------------------------------ =
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257 8272D–AVR–05/12 ATmega164A/PA/324A/PA/644A/PA/1284/P Figure 23-14. Differential measurement range. Table 23-2. Correlation between input voltage and output codes. V ADCn Read code Corresponding decimal value V ADCm + V REF /GAIN 0x1FF 511 V ADCm + 0.999V REF /GAIN 0x1FF 511 V ADCm + 0.998V REF /GAIN 0x1FE 510 ... ... ... V ADCm + 0.001V REF /GAIN 0x001 1 V ADCm 0x000 0 V ADCm - 0.001V REF /GAIN 0x3FF -1 ... ... ... V ADCm - 0.999V REF /GAIN 0x201 -511 V ADCm - V REF /GAIN 0x200 -512 0 Output Code 0x1FF 0x000 V REF /GAIN Differential Input Voltage (Volts) 0x3FF 0x200 - V REF /GAIN
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258 8272D–AVR–05/12 ATmega164A/PA/324A/PA/644A/PA/1284/P Example: ADMUX = 0xED (ADC3 - ADC2, 10× gain, 2.56V reference, left adjusted result) Voltage on ADC3 is 300mV, voltage on ADC2 is 500mV. ADCR = 512 × 10 × (300 - 500) / 2560 = -400 = 0x270 ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts the result: ADCL = 0x70, ADCH = 0x02. 23.9 Register description 23.9.1 ADMUX – ADC Multiplexer Selection Register Bit 7:6 – REFS1:0: Reference Selection Bits These bits select the voltage reference for the ADC, as shown in Table 23-3 . If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external reference voltage is being applied to the AREF pin. Note: If differential channels are selected, only 2.56V should be used as Internal Voltage Reference. Bit 5 – ADLAR: ADC Left Adjust Result The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver- sions. For a complete description of this bit, see ”ADCL and ADCH – The ADC Data Register” on page 261 .
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  • Fall '13
  • Central processing unit, X86, Processor register, Atmel AVR, Atmel

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