A bus in which there is an individual line for each

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21) A bus in which there is an individual line for each bit of data, address, and control is called a a) wide bus. b) serial bus. c) parallel bus. d) dedicated bus. 22) A bus that transfers data sequentially, one bit at a time using just a single line pair is called a) a serial bus. b) a single bus. c) a narrow bus. d) a sequential bus. 23) A bus line that is "one-way" is called a) a simplex bus line. b) a serial bus line. c) a one-way bus line. d) a sequential bus line. 24) A bus line that can carry data in both directions at the same time is called a
a) simplex bus line. b) complex bus line. c) full duplex bus line . d) half duplex bus line. 25) The exposed connectors into which external cables can be plugged are often called a) plugs. b) lines. c) ports. d) stacks. 26) A bus that carries signals from a single specific source to a single specific destination is a(n) a) simplex bus. b) broadcast bus. c) Ethernet bus. d) point-to-point bus. 27) Virtually every bus internal to the CPU is a) serial. b) cables. c) optical. d) parallel. 28) Instructions that only the operating system can execute are called a) system instructions. b) executive instructions. c) privileged instructions. d) administrative instructions. 29) Programs that execute without privileges are said to execute a) in user space. b) in data mode. c) in kernel space. d) in privilege space. 30) Multimedia applications, like modifying an image, often use a) PSW instructions. b) Flash instructions. c) MMD instructions. d) SIMD instructions. 31) The sources and destinations of data for an instruction are known as a) Op codes. b) Operands. c) Op registers. d) Operation fields. 32) Increasing the number of bits available for the op code in an instruction word a) increases the demand on the CPU. b) increases the number of memory locations that can be addressed. c) increases the number of instructions available in the instruction set. d) has no impact on any of the above. Chapter 8: CPU and Memory Design Enhancement and Implementation
1) CPU architecture is defined by the basic characteristics and major features of the CPU. “CPU architecture” is sometimes called a) architecture design b) structural organization c) instruction set architecture d) CPU design and organization 2) The use of fixed-length, fixed-format instruction words with the op code and address fields in the same position for every instruction would allow instructions to be fetched and decoded a) independently. b) dependently and in parallel. c) independently and in serial. d) independently and in parallel.

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