EEL6323-S10-HLec07-MultiStageLE-P2-4spp

# How fast can decoder operate a30 bits 16 words 416

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– How fast can decoder operate? A[3:0] A[3:0] 16 32 bits 16 words 4:16 Decoder Register File Initial Dilema You need the path effort to calculate the optimum number of stages You need the path logical effort to calculate the path effort Without knowing the number of stages you cannot draw a path, determine the logical effort of the path and find the path effort N = log ρ F ii i F fg h   = GBH i G g From ρ =F 1/N Stage effort ρ =3-4 Number of Stages Decoder effort is mainly electrical and branching Electrical Effort: H = (32*3) / 10 = 9.6 Branching Effort: B = 8 If we neglect logical effort (assume G = 1) Path Effort: F = GBH = 76.8 Number of Stages: N = log 4 F = 3.1 Try a 3-stage decoder design Each address is used to compute Half of the 16 word lines; its Complement Is used for the other half 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

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4 Delay Logical Effort: G = 1 * 6/3 * 1 = 2 Path Effort: F = GBH = 2*8*9.6=154 Stage Effort: Path Delay: A[3] A[3] A[2] A[2] A[1] A[1] A[0] A[0] word[0] word[15] 96 units of wordline capacitance 10 10 10 10 10 10 10 10 yz 1/3 ˆ 5.36 fF  ˆ 31 4 1 2 2 . 1 Df  0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Gate Sizes & Delay Gate sizes: z = 96*1/5.36 = 18 y = 18*2/5.36 = 6.7 A[3] A[3] A[2] A[2] A[1] A[1] A[0] A[0] word[0] word[15] 96 units of wordline capacitance 10 10 10 10 10 10 10 10 ˆ ˆ out in i i C C io u t in fg hg g C C f  Comparison Compare many alternatives with a spreadsheet 21.6 8 16/9 6 NAND2-INV-NAND2-INV-INV-INV 20.4 7 16/9 5 INV-NAND2-INV-NAND2-INV 19.7 6 16/9 4 NAND2-INV-NAND2-INV 20.5 6 20/9 4 NAND2-NOR2-INV-INV 21.1 7 2 4 NAND4-INV-INV-INV 22.1 6 2 3 INV-NAND4-INV 30.1 4 20/9 2 NAND2-NOR2 29.8 5 2 2 NAND4-INV D P G N Design Review of Definitions delay parasitic delay effort delay effort branching effort electrical effort logical effort number of stages Path Stage Term i Gg out-path in-path C C H N i Bb FG B
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• Spring '08
• Bashirullah
• Gate, stage, Cancer staging, logical effort, best stage effort

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