Dspic33pic24 family reference manual sections 2

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“dsPIC33/PIC24 Family Reference Manual” sections. 2: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). 3: Typical value for this parameter is 130 ns. 4: These parameters are characterized but not tested in manufacturing.
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2013-2016 Microchip Technology Inc. DS70005144E-page 389 dsPIC33EVXXXGM00X/10X FAMILY FIGURE 30-30: I2Cx BUS START/STOP BITS TIMING CHARACTERISTICS (SLAVE MODE) FIGURE 30-31: I2Cx BUS DATA TIMING CHARACTERISTICS (SLAVE MODE) SCLx SDAx Start Condition Stop Condition IS34 IS33 IS31 IS30 IS30 IS31 IS33 IS11 IS10 IS20 IS25 IS40 IS40 IS45 IS21 SCLx SDAx In SDAx Out IS26
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dsPIC33EVXXXGM00X/10X FAMILY DS70005144E-page 390 2013-2016 Microchip Technology Inc. TABLE 30-47: I2Cx BUS DATA TIMING REQUIREMENTS (SLAVE MODE) AC CHARACTERISTICS Standard Operating Conditions: 4.5V to 5.5V (unless otherwise stated) Operating temperature -40°C T A +85°C for Industrial -40°C T A +125°C for Extended Param. No. Symbol Characteristic ( 3 ) Min. Max. Units Conditions IS10 T LO : SCL Clock Low Time 100 kHz mode 4.7 s 400 kHz mode 1.3 s 1 MHz mode ( 1 ) 0.5 s IS11 T HI : SCL Clock High Time 100 kHz mode 4.0 s Device must operate at a minimum of 1.5 MHz 400 kHz mode 0.6 s Device must operate at a minimum of 10 MHz 1 MHz mode ( 1 ) 0.5 s IS20 T F : SCL SDAx and SCLx Fall Time 100 kHz mode 300 ns C B is specified to be from 10 to 400 pF 400 kHz mode 20 + 0.1 C B 300 ns 1 MHz mode ( 1 ) 100 ns IS21 T R : SCL SDAx and SCLx Rise Time 100 kHz mode 1000 ns C B is specified to be from 10 to 400 pF 400 kHz mode 20 + 0.1 C B 300 ns 1 MHz mode ( 1 ) 300 ns IS25 T SU : DAT Data Input Setup Time 100 kHz mode 250 ns 400 kHz mode 100 ns 1 MHz mode ( 1 ) 100 ns IS26 T HD : DAT Data Input Hold Time 100 kHz mode 0 s 400 kHz mode 0 0.9 s 1 MHz mode ( 1 ) 0 0.3 s IS30 T SU : STA Start Condition Setup Time 100 kHz mode 4.7 s Only relevant for Repeated Start condition 400 kHz mode 0.6 s 1 MHz mode ( 1 ) 0.25 s IS31 T HD : STA Start Condition Hold Time 100 kHz mode 4.0 s After this period, the first clock pulse is generated 400 kHz mode 0.6 s 1 MHz mode ( 1 ) 0.25 s IS33 T SU : STO Stop Condition Setup Time 100 kHz mode 4.7 s 400 kHz mode 0.6 s 1 MHz mode ( 1 ) 0.6 s IS34 T HD : STO Stop Condition Hold Time 100 kHz mode 4 s 400 kHz mode 0.6 s 1 MHz mode ( 1 ) 0.25 s IS40 T AA : SCL Output Valid From Clock 100 kHz mode 0 3500 ns 400 kHz mode 0 1000 ns 1 MHz mode ( 1 ) 0 350 ns IS45 T BF : SDA Bus Free Time 100 kHz mode 4.7 s Time the bus must be free before a new transmission can start 400 kHz mode 1.3 s 1 MHz mode ( 1 ) 0.5 s IS50 C B Bus Capacitive Loading 400 pF IS51 T PGD Pulse Gobbler Delay 65 390 ns See Note 2 Note 1: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). 2: The typical value for this parameter is 130 ns. 3: These parameters are characterized but not tested in manufacturing.
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2013-2016 Microchip Technology Inc. DS70005144E-page 391 dsPIC33EVXXXGM00X/10X FAMILY FIGURE 30-32: CANx MODULE I/O TIMING CHARACTERISTICS TABLE 30-48: CANx MODULE I/O TIMING REQUIREMENTS FIGURE 30-33: UARTx MODULE I/O TIMING CHARACTERISTICS TABLE 30-49: UARTx MODULE I/O TIMING REQUIREMENTS
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