External interrupts external interrupts initiated

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External interrupts External Interrupts initiated from the outside of CPU and Memory - I/O Device → Data transfer request or Data transfer complete - Timing Device → Timeout - Power supply Power Failure Internal interrupts (traps) Internal Interrupts are arises from illegal or erroneous use of instn. or data - initiated by program itself rather than external event - Register, Stack Overflow - Divide by zero - OP-code Violation - Protection Violation Software Interrupts Both External and Internal Interrupts are initiated by the computer HW. Software Interrupts are initiated by the executing an instruction. - Supervisor Call 1. Switching from a user mode to the supervisor mode 2. Allows to execute a certain class of operations which are not allowed in the user mode
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Central Processing Unit 41 IBM System/360, 1964 The real beginning of modern computer architecture Distinction between Architecture and Implementation Architecture: The abstract structure of a computer seen by an assembly-language programmer Continuing growth in semiconductor memory and microprogramming A much richer and complicated instruction sets CISC(Complex Instruction Set Computer) High-Level Language Instruction Set Hardware Compiler -program Architecture Implementation Hardware Hardware RISC- Historical BackGround
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Central Processing Unit 42 Arguments Advanced at that time Richer instruction sets would simplify compilers Richer instruction sets would alleviate the software crisis move as much functions to the hardware as possible Richer instruction sets would improve architecture quality These computers with many instructions and addressing modes came to be known as Complex Instruction Set Computers (CISC) One essential goal for CISC machines was to provide a single machine instruction for each statement that is written in high level language. Another characteristic was incorporation of variable length instruction format. CISC CISC
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Central Processing Unit 43 Complex Instruction Set Computers Another characteristic of CISC computers is that they have instructions that act directly on memory addresses For example, ADD L1, L2, L3 that takes the contents of M [ L1 ] adds it to the contents of M [ L2 ] and stores the result in location M [ L3 ] An instruction like this takes three memory access cycles to execute That makes for a potentially very long instruction execution cycle The problems with CISC computers are The complexity of the design may slow down the processor, The complexity of the design may result in costly errors in the processor design and implementation, Many of the instructions and addressing modes are used rarely, if ever
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Central Processing Unit 44 Summary : Criticism On CISC High Performance General Purpose Instructions - Complex Instruction → Format, Length, Addressing Modes → Complicated instruction cycle control due to the complex decoding HW and decoding process - Multiple memory cycle instructions → Operations on memory data
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