[B._Beckhoff,_et_al.]_Handbook_of_Practical_X-Ray_(b-ok.org).pdf

F 3 f 2 f 1 10 5 u volts y 20 10 50 100 x microns 150

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F 3 F 2 F 1 anode 20 15 10 5 0 -U [volts] y [microns] 40 30 20 10 0 50 100 x [microns] 150 200 0 Fig. 4.47. Negative potential distribution inside the pn-CCD pixel according to charge transfer sequence. In this operating condition the signal charges are stored under the registers φ 2 and φ 3 . The electrons now share a larger volume for a short time. Note that the electrons are still nicely confined in the potential well of approximately 10 µ m below the shift registers. The p + back contact is not shown: it expands quite uniformly an additional 260 µ m toward a negative potential of 150 V. The sequence of changing potentials shows nicely the controlled transfer from register Φ 3 to register Φ 2 , one-third of a pixel.
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268 L. Str¨uder et al. F 3 F 2 F 1 anode 20 15 10 5 0 -U [V] 40 30 20 10 0 50 100 x [ m m] 150 200 0 y [ m m] Fig. 4.48. Negative potential distribution inside the pn-CCD pixel at next transfer step. In this operating condition the signal charges are stored under the register φ 2 only. The charge was transferred by one-third of the pixel length in approximately 150 ns On chip readout electronics Back contact Sensitive thickness (280 m m) Shift of signal charges f 3 f 2 f 1 Transfer registers 1 pixel (150 x 150 m m 2 ) Fig. 4.49. Inside the pn-CCD. The X-rays hit the device from the back (bottom). The charges are collected in the pixel well close to the surface having the pixel structure. After integration, they are transferred to the on-chip amplifier This concept is seen from a different point of view in Fig. 4.49, seen from the inside of a pn-CCD: X-rays hit the detector from the back (indicated as back contact in Fig. 4.49). The positively charged holes move to the negatively biased back contact, electrons to their local potential minimum in the transfer channel, located about 10 µ m below the surface having the pixel structure. The electrons are fully collected in the pixels after 5 ns at most, the collection of holes is completed in no more than 15 ns because of their reduced mobility. As can be seen in Fig. 4.49, each CCD column is terminated by a readout
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X-Ray Detectors and XRF Detection Channels 269 (FZ-Epi-Si) 768 readout channels 100 mm wafer 0.15 64 7 61 0.15 Transfer along 200 pixel CAMEX Pixel Fig. 4.50. The focal plane of the pn-CCD camera on XMM and ABRIXAS consists of 12 independent, monolithically integrated pn-CCDs with a total image area of approximately 60 × 60 mm 2 . In total 768 on-chip amplifiers process the signals and transfer them to a VLSI JFET-CMOS amplifier array. The 12 output nodes of the CAMEX arrays are fed into four ADCs, i.e., one ADC is dedicated to a quadrant amplifier. The on-chip single-sided JFET has already been described in the chapter written by Longoni and Fiorini in this book as the first amplifying element in the SDD. The focal plane layout of XMM is depicted in Fig. 4.50. Four individ- ual quadrants each having three pn-CCD subunits are operated in parallel.
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  • Spring '14
  • MichaelDudley

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