from the keyboard is shifted into INPR The serial info for the printer is

From the keyboard is shifted into inpr the serial

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- The serial info. from the keyboard is shifted into INPR - The serial info. for the printer is stored in the OUTR - INPR and OUTR communicate with the communication interface serially and with the AC in parallel. - The flags are needed to synchronize the timing difference between I/O device and the computer A Terminal with a keyboard and a Printer Input-output terminal Serial communication interface Computer registers and flip-flops Printer Keyboard Receiver interface Transmitter interface FGO OUTR AC INPR FGI Serial Communications Path Parallel Communications Path
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Basic Computer Organization and Design 38 CSE 211 Determining Type of Instruction FGI =1 when new information available at input device, and cleared to 0 when information accepted by computer Initially FGI=0, new key pressed , 8 bit alphanumeric shifted to INPR and FGI=1, Computer checks flag if 1 then transfer content to AC and clear FGI to 0. Initially FGO=1, - computer checks flag bit if 1, then OUTR AC and clears FGO=0 - O/P device accepts information prints character and finally sets FGO=1.
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Basic Computer Orgsnisation and Design 40 CSE 211 Input/Output Instructions D 7 IT 3 = p IR(i) = B i , i = 6, …, 11 p: SC 0 Clear SC INP pB 11 : AC(0-7) INPR, FGI 0 Input char. to AC OUT pB 10 : OUTR AC(0-7), FGO 0 Output char. from AC SKI pB 9 : if(FGI = 1) then (PC PC + 1) Skip on input flag SKO pB 8 : if(FGO = 1) then (PC PC + 1) Skip on output flag ION pB 7 : IEN 1 Interrupt enable on IOF pB 6 : IEN 0 Interrupt enable off I/O instructions are needed for transferring info to and from AC register, for checking the flag bits and for controlling interrupt facility
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Basic Computer Organization and Design 41 CSE 211 Program controlled Input/Output Program-controlled I/O - Continuous CPU involvement CPU keeps checking flag bit. If 1 then initiates transfer I/O takes valuable CPU time - Difference in information flow rate makes this type of transfer inefficient Alternative approach is to let external device inform the computer when it is ready for transfer, in meantime computer can be busy with other task - Interrupt
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Basic Computer Organization and Design 42 CSE 211 Interrupt Initiated Input/Output - Open communication only when some data has to be passed --> interrupt . - The I/O interface, instead of the CPU, monitors the I/O device. - When the interface founds that the I/O device is ready for data transfer, it generates an interrupt request to the CPU - Upon detecting an interrupt, the CPU stops momentarily the task it is doing, branches to the service routine to process the data transfer, and then returns to the task it was performing. IEN (Interrupt-enable flip-flop) - can be set and cleared by instructions - When cleared (IEN=0) the computer cannot be interrupted - When set (IEN=1) the computer can be interrupted
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Basic Computer Organization and Design 43 CSE 211 Flow Chart of Interrupt Cycle R = Interrupt f/f - The interrupt cycle is a HW implementation of a branch and save return address operation.
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