statement is not auto indented end 34 Misplaced semicolons in for loops Gotcha

Statement is not auto indented end 34 misplaced

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statement is not auto-indentedend3.4 Misplaced semicolons in for loopsGotcha: My forloop only executes one time.Synopsis: A semicolon at the end of a forloop declaration effectively makes the loop alwaysexecute just one time. A semicolon ( ;) by itself is a complete programming statement, representing a null-operationstatement. A misplaced semicolon after for()is syntactically legal. However, the misplacedsemicolon has the effect of making loop appear to only execute one time.module foo;integer i;initial beginfor (i=0; i<=15; i=i+1);// semicolon is NOT an errorbegin$display("Loop pass executing");// GOTCHA!only executes onceendendendmoduleIn the example above, there is no syntax error. The semicolon is a legal statement, and is the onlystatement within the forloop. The begin...endgroup with the $displaystatement is not part ofthe forloop. The loop will execute 16 times, executing a null statement. After the loop hascompleted, the group of statements that appear to be inside the loop—but which are not—willexecute one time. Gotcha!Note that this gotcha can also occur with while, repeat, foreverand foreachloops. Looping multiple times executing a null statement is not necessarily a coding error. A commonverification coding style is to use an empty repeatloop to skip multiple clock cycles. Forexample:initial beginresetN <= 0;repeat (8) @(posedge clock) ;// loop for 8 clock cycles doing nothingresetN = 1;...endHow to avoid this gotcha:This gotcha is inherited from the C programming language, where thesame coding error is syntactically legal. A language-aware editor with auto-indenting can help to
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SNUG San Jose 200717More Gotchas in Verilog and SystemVerilogavoid this gotcha. A good Verilog editor will show the indentation to be wrong for this code,which will indicate a misplaced semicolon.There is another gotcha with the forloop example above. Even though a null statement in a forloop is legal code, some tools, including VCS, make it a syntax error. The intent in making this anerror is to help engineers avoid a common C programming gotcha. Unfortunately, it also meansthat if the engineer actually wanted an empty forloop, these tools do not allow what should belegal code. The workaround, if an empty loop is actually intended, is to replace the null statementwith an empty begin...endstatement group.3.5 Infinite for loopsGotcha: My forloop never exits.Synopsis: Declaring too small of a forloop control variable can result in loops that never exits.A forloop executes its statements until the loop control expression evaluates as false. As in mostprogramming languages, it is possible to write a forloop where the control expression is alwaystrue, creating an infinite loop that never exits. This general programming gotcha is more likely tooccur in Verilog, because Verilog allows engineers to define small vector sizes.
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