Load on CTR Zero Time base counter equal to zero TBCTR 0x0000 01 Load on CTR

Load on ctr zero time base counter equal to zero

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Load on CTR = Zero: Time-base counter equal to zero (TBCTR = 0x0000) 01 Load on CTR = PRD: Time-base counter equal to period (TBCTR = TBPRD) 10 Load on either CTR = Zero or CTR = PRD (should not be used with HRPWM) 11 Freeze (no loads possible – should not be used with HRPWM) 2 CTLMODE Control Mode Bits: Selects the register (CMP or TBPHS) that controls the MEP: 0 CMPAHR(8) Register controls the edge position ( i.e., this is duty control mode). (default on reset) 1 TBPHSHR(8) Register controls the edge position ( i.e., this is phase control mode). 1-0 EDGMODE Edge Mode Bits: Selects the edge of the PWM that is controlled by the micro-edge position (MEP) logic: 00 HRPWM capability is disabled (default on reset) 01 MEP control of rising edge 10 MEP control of falling edge 11 MEP control of both edges (1) This register is EALLOW protected. Figure 13. Counter Compare A High Resolution Register (CMPAHR) 15 8 7 0 CMPAHR Reserved R/W-0 R/W-0 LEGEND: R/W = Read/Write; R = Read only; - n = value after reset Table 8. Counter Compare A High Resolution Register (CMPAHR) Field Descriptions Bit Field Value Description 15-8 CMPAHR Compare A High Resolution register bits for MEP step control. A minimum value of 0x0001 is needed to enable HRPWM capabilities. Valid MEP range of operation 1-255h. 7-0 Reserved High-Resolution Pulse Width Modulator (HRPWM) 24 SPRUG02–February 2009 Submit Documentation Feedback
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