This equation for determining the effective access

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This equation for determining the effective access time can be extended to any number of memory levels 31 Cache Locality Caching is depends upon programs exhibiting good locality: Some object-oriented programs have poor locality owing to their complex, dynamic structures Arrays stored in column-major rather than row- major order can be problematic for certain cache organizations With poor locality, caching can actually cause performance degradation rather than performance improvement 32
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2/23/2012 17 Cache Write Policies Cache replacement policies must take into account dirty blocks Dirty blocks must be written back to memory at some point in time A write policy determines how this will be done There are two types of write policies: write through write back 33 Write-Through Updates cache and main memory simultaneously on every write +Memory always agrees with cache - Memory must be updated with each cache write Slows down the access time on updates Usually negligible, because the majority of accesses tend to be reads, not writes 34
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2/23/2012 18 Write-Back Also known as copyback Updates memory only when the block is selected for replacement +Memory traffic is minimized - Memory does not always agree with the value in cache Creates problems in systems with multiple, concurrent users 35 Instruction and Data Cache The cache we have been discussing is called a unified or integrated cache Instructions and data are cached together Many modern systems employ separate caches for data and instructions Called a Harvard cache The separation of data and instruction cache provides better locality At the cost of greater complexity 36
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2/23/2012 19 Cache Hierarchies Today’s systems employ multi-level caches The levels of cache form their own memory hierarchy Two Level Cache Level 1 cache (8 KB to 256 KB) is situated on the processor itself Access time is typically about 4ns Level 2 cache (512 KB to 8 MB) has typically been on the motherboard Access time is usually around 15 - 20ns 37 Cache Hierarchies Three Level Cache A new level 2 cache is added on the same die as the CPU Access time is around 10ns Level 3 cache is the cache between the processor and main memory (on the motherboard) Typically 2MB to 256MB 38
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2/23/2012 20 Our “Obsolete” System 39 Duplication of Memory in Cache Can data (or instructions) be cached at more than one level? In an inclusive cache, the answer is yes Strictly inclusive caches guarantee that all data in a smaller cache also exists at the next higher level Exclusive caches permit only one copy of the data anywhere in cache The tradeoffs in choosing one over the other involve weighing the variables of access time, memory size, and circuit complexity 40
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2/23/2012 21 Virtual Memory Cache memory enhances performance by providing faster memory access speed Virtual memory enhances performance by providing greater memory capacity, without the expense of adding main memory Instead, a portion of a disk drive serves as an extension of main memory If a system uses paging, virtual memory
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  • Fall '09
  • Hansen
  • Virtual memory, CPU cache, Cache algorithms, main memory

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