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Nirma University, Ahmedabad
ELECTRONIC
ELECTRONIC 101
nocase patterns getlibcells regexp hsc separator nocase patterns getlibpins
Nocase patterns getlibcells regexp hsc separator
School
Nirma University, Ahmedabad
Course Title
ELECTRONIC 101
Uploaded By
NIX193
Pages
38
This
preview
shows page
25 - 31
out of
38
pages.
[-nocase]
patterns
get_lib_cells
[-regexp]
[-hsc
separator
]
[-nocase]
patterns
get_lib_pins
[-regexp]
[-nocase]
patterns
Table A-2
Object Access Commands (Continued)
Command
Supported arguments
Appendix A: SDC Syntax
Object Access Commands
A-4
Using the Synopsys Design Constraints Format Application Note
2.0
Using the Synopsys Design Constraints Format Application Note
Version 2.0
get_libs
[-regexp]
[-nocase]
patterns
get_nets
[-hierarchical]
[-hsc
separator
]
[-regexp]
[-nocase]
-of_objects
objects
patterns
get_pins
[-hierarchical]
[-hsc
separator
]
[-regexp]
[-nocase]
-of_objects
objects
patterns
get_ports
[-regexp]
[-nocase]
patterns
Table A-2
Object Access Commands (Continued)
Command
Supported arguments
Appendix A: SDC Syntax
Timing Constraints
A-5
Using the Synopsys Design Constraints Format Application Note
Version 2.0
Timing Constraints
Table A-3
Timing Constraints
Command
Supported arguments
create_clock
-period
period_value
[-name
clock_name
]
[-waveform
edge_list
]
[-add]
[-comment
comment_string
]
[
source_objects
]
create_generated_clock
[-name
clock_name
]
-source
master_pin
[-edges
edge_list
]
[-divide_by
factor
]
[-multiply_by
factor
]
[-duty_cycle
percent
]
[-invert]
[-edge_shift
shift_list
]
[-add]
[-master_clock
clock
]
[-combinational]
[-comment
comment_string
]
source_objects
group_path
[-name
group_name
]
[-default]
[-weight
weight_value
]
[-from
from_list
]
[-rise_from
from_list
]
[-fall_from
from_list
]
[-to
to_list
]
[-rise_to
to_list
]
[-fall_to
to_list
]
[-through
through_list
]
[-rise_through
through_list
]
[-fall_through
through_list
]
[-comment
comment_string
]
Appendix A: SDC Syntax
Timing Constraints
A-6
Using the Synopsys Design Constraints Format Application Note
2.0
Using the Synopsys Design Constraints Format Application Note
Version 2.0
set_clock_gating_check
[-setup
setup_value
]
[-hold
hold_value
]
[-rise]
[-fall]
[-high]
[-low]
[
object_list
]
set_clock_groups
-group
clock_list
[-logically_exclusive]
[-physically_exclusive]
[-asynchronous]
[-allow_paths]
[-name
name
]
[-comment
comment_string
]
set_clock_latency
[-rise]
[-fall]
[-min]
[-max]
[-source]
[-late]
[-early]
[-clock
clock_list
]
delay
object_list
set_clock_sense
[-positive]
[-negative]
[-pulse pulse]
[-stop_propagation]
[-clock
clock_list
]
pin_list
Table A-3
Timing Constraints (Continued)
Command
Supported arguments
Appendix A: SDC Syntax
Timing Constraints
A-7
Using the Synopsys Design Constraints Format Application Note
Version 2.0
set_clock_transition
[-rise]
[-fall]
[-min]
[-max]
transition
clock_list
set_clock_uncertainty
[-from
from_clock
]
[-rise_from
rise_from_clock
]
[-fall_from
fall_from_clock
]
[-to
to_clock
]
[-rise_to
rise_to_clock
]
[-fall_to
fall_to_clock
]
[-rise]
[-fall]
[-setup]
[-hold]
uncertainty
[
object_list
]
set_data_check
[-from
from_object
]
[-to
to_object
]
[-rise_from
from_object
]
[-fall_from
from_object
]
[-rise_to
to_object
]
[-fall_to
to_object
]
[-setup]
[-hold]
[-clock
clock_object
]
value
set_disable_timing
[-from
from_pin_name
]
[-to
to_pin_name
]
cell_pin_list
Table A-3
Timing Constraints (Continued)
Command
Supported arguments
Appendix A: SDC Syntax
Timing Constraints
A-8
Using the Synopsys Design Constraints Format Application Note
2.0
Using the Synopsys Design Constraints Format Application Note
Version 2.0
set_false_path
[-setup]
[-hold]
[-rise]
[-fall]
[-from
from_list
]
[-to
to_list
]
-through
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TERM
Spring '14
PROFESSOR
NMD
TAGS
Object-Oriented Programming,
Computer file,
SDC,
Synopsys Design Constraints
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