EET380_U2_Lab1.docx

# In this circuit the 4 function generators are

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In this circuit, the 4 function generators are creating different DC level to be able to track the operation of the TDM-PAM circuit. However, you may use a waveform instead of DC level. Be careful! do select the frequency of the waveforms less than half of the sampler frequency (5 x 1 kHz), otherwise the signal would not be uniquely recoverable at receiver.

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Like 4066, 4016 chip is also a quad of analog switches. In this circuit, you also see 4017 chip. This chip is a decade ring counter, which also may work as base-5 counter. In the above circuit, we just employ 4 channels of the available 5 channels for TDM-PAM. Experiment A.1 : Run the simulation and look at the oscilloscope screen. Describe your observation briefly.
It is a signal that has 4 different voltage levels and also looks like a set of steps. Experiment A.2 : Using the two oscilloscope cursors, measure the duration of one whole period of the multiplexer. Then put the snapshot of your measurement here. Compare your measurement result with the period of the clock pulse at ring counter 4017. Write your reasoning. The period for one period of the multiplexer is 4 ms. Each pulse of the clock pulse is 1 ms in time. It takes about 4 clock pulses to create one period of the multiplexer. Task : Explain what do you need to do to increase the number of the multiplexed signals from 4 to 5? Do you have any idea how to increase the number of multiplexed signals to 10 signals?

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Hint: Look into the datasheet of 4017. One rich place that you may find the data sheet of this chip and any other electronic parts (no ordinary resistor, capacitor or inductor) is: . Then, after selecting one manufacturer’s product as shown below: Select a proper part to open its datasheet in pdf format, as shown below: The physical, electrical and functional details of the chip’s characteristics are in the opened datasheet. Space for answer to the given task: If more signals need to be multiplexed, the timing should be changed for the outputs. The transition period for the master reset signal needs to be longer.

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