ܨሺݔǡݕǡݖሻσሺͳǡʹǡǡǡ? b

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ܨሺݔǡݕǡݖሻൌσሺͳǡʹǡ͵ǡ͸ǡ͹ሻ b) ܨൌݓݔݕ൅ݕݖ൅ݔݕ ݖ൅ݔԢݕ c) ܨሺݓǡݔǡݕǡݖሻൌσሺͲǡͳǡʹǡ͵ǡ͹ǡͺǡͳͲሻ൅σሺͷǡ͸ǡͳͳǡͳͷሻ d) ܨሺܣǡܤǡܥǡܦሻൌσሺ͵ǡͶǡͳ͵ǡͳͷሻ൅σͳǡʹǡͷǡ͸ǡͺǡͳͲǡͳʹǡͳͶሻ e) ܨሺܣǡܤǡܥǡܦሻൌςܯሺͲǡͳǡʹǡ͵ǡͶǡ͹ǡͺǡͳͳǡͳʹǡͳͶǡͳͷሻ f) ܨሺܣǡܤǡܥǡܦሻൌσሺͳǡͶǡͷǡ͸ǡͳʹǡͳͶǡͳͷሻ
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Digital Logic Design Dept. of ECE KL University, Guntur 4. Simplify the following expressions and implement them with two-level NAND gate circuits: a) ܨൌܣܤ ൅ܣܤܦ൅ܣܤܦ ൅ܣ ܥ ܦ ൅ܣ ܤܥ b) ܨൌܤܦ൅ܤܥܦ ൅ܣܤԢܥԢܦԢ 5. Simplify the following expressions and implement them with two-level NOR gate circuits: a) ܨൌݓݔ ൅ݕ ݖ ൅ݓ ݕݖ b) ܨൌσሺͷǡ͸ǡͻǡͳͲሻ 6. a) Verify that the following operations are commutative but not associative i) NAND ii) NOR b) Verify that the following operations are commutative and associative i) AND ii) OR iii) EX-OR 7. Explain the operation of a 3 input TTL NAND gate with circuit diagram and also explain the purpose of the totem-pole output state used in a TTL gate. 8. Explain the circuit diagram of CMOS gates and explain their operation.
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