TMS320F28335, TMS320F28334, TMS320F28332TMS320F28235, TMS320F28234, TMS320F28232SPRS439H–JUNE 2007–REVISED MARCH 20103.7Low-Power Modes BlockThe low-power modes on the 2833x/2823x devices are similar to the 240x devices.Table 3-19summarizes the various modes.Table 3-19. Low-Power ModesMODELPMCR0(1:0)OSCCLKCLKINSYSCLKOUTEXIT(1)XRS, Watchdog interrupt, any enabledIDLE00OnOnOn(2)interrupt, XNMIOnXRS, Watchdog interrupt, GPIO Port ASTANDBY01OffOff(watchdog still running)signal, debugger(3), XNMIOffXRS, GPIO Port A signal, XNMI,HALT1X(oscillator and PLL turned off,OffOffdebugger(3)watchdog not functional)(1)The Exit column lists which signals or under what conditions the low power mode will be exited. A low signal, on any of the signals, willexit the low power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise, theIDLE mode will not be exited and the device will go back into the indicated low power mode.(2)The IDLE mode on the C28x behaves differently than on the 24x/240x. On the C28x, the clock output from the CPU (SYSCLKOUT) isstill functional while on the 24x/240x the clock is turned off.(3)On the C28x, the JTAG port can still function even if the CPU clock (CLKIN) is turned off.The various low-power modes operate as follows:IDLE Mode:This mode is exited by any enabled interrupt or an XNMI that is recognizedby the processor. The LPM block performs no tasks during this mode aslong as the LPMCR0(LPM) bits are set to 0,0.STANDBY Mode:Any GPIO port A signal (GPIO[31:0]) can wake the device from STANDBYmode. The user must select which signal(s) will wake the device in theGPIOLPMSEL register. The selected signal(s) are also qualified by theOSCCLK before waking the device. The number of OSCCLKs is specified inthe LPMCR0 register.
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Serial Peripheral Interface Bus, Texas Instruments Incorporated, TMS320F28335