Assignment2_distributed.pdf

Xybc xybc xybc xyabc d b b d c x xybc c x y b c x d c

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= x`y`BC+ xyB`C+ xyB`C+ xyA`BC D B B D C = x+ xyBC` C x y B C` x D C x y A` B C x y B` C x y B C x` y` B C D A = xy`AC+ xyAC + y`AB`C`+ xyA`BC+ xy`ABC+ xy`ABC D A A x` y A C x y A C y` A B` C` x y A B C x y` A B C x y A B C D B = x`y`BC+ xyB`C+ xyB`C+ xyABC D B B D C = x+ x`yBC C x` y B C x D C x y A B C x y B` C x y B C x` y` B C D A = x`yAC+ xyAC + y`AB`C`+ xyA`BC+ xy`ABC+ xyABC
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c- d- D A A x y A C` x y A C y` A B` C` x y A B C x y A B` C x y` A B C D B = x`yBC`+ xyB`C+ xyB`C+ xyAB`C D B B D C = x+ xABC` C x A B C` x D C x y A B` C x y B` C x y B C x` y B C` D A = xyAC`+ xyAC + y`AB`C`+ xyA`BC+ xyAB`C+ xy`ABC D A A x y A C` x` y A C y` A B` C` x y A` B C x y A B` C x y` A B C D B = x`y`BC`+ xyBC+ xyB`C+ xyAB`C D B B D C = y+ xABC` C x A B C` y D C x y A B` C x y B` C x y B C x` y` B C` D A = xyAC`+ x`yAC + y`AB`C`+ xyA`BC+ xyAB`C+ xy`ABC
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e- f- None of the above 5. Design a sequential circuit with two T flip-flops A and B and two inputs E and x. if E = 0 and x=0, the circuit remains in the same state, when E = 0 and x= 1, the circuit goes through the state transitions from 00, 01, 10, 11 respectively then repeats. When E=1 and x=1, the states are; 00, 10, 01 ,11 back to 00, and repeat. When E = 1 and x = 0, the circuit goes through the backward counter from 11 to 10 to 01 to 00 back to 11, and repeat. i- Construct the state diagram and match it to one of the following; a - b- c- d- = D A A x` y` A C` x` y A C y` A B` C` x y A` B C x y A B` C x y` A` B C` D B = x`y`BC`+ x`yBC+ xyB`C+ xy`AB`C D B B D C = y+ xA`B`C` C x A` B` C` y D C x y` A B` C x y B` C x` y B C x` y` B C` D A = x`y`AC`+ x`yAC + y`AB`C`+ xyA`BC+ xyAB`C+ xy`A`BC` 10 11 01 00 Ex=(00) 10 (00) 01 10 (00) 01 01 01 10 10 11 11 11 11 (10) 10 11 01 00 Ex=(00) 10 (01) 01 10 (11) 01 01 01 10 10 11 11 00 11 (10) 10 11 01 00 Ex=(00) 10 (01) 01 10 (11) 01 01 01 10 10 11 11 11 (10) 10 11 01 00 Ex=(00) (01) 01 10 (11) 01 01 01 10 11 11 11
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e- f- None of the above ii- Complete the state table. A(t) B(t) E x A(t+1) B(t+1) T A T B 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 iii- Draw the state diagram and match it to one of the following; a- b- = (10) 10 11 01 00 Ex=(00) 10 (01) 01 (11) 01 01 10 11 T A =Bx+A+E+B`E T B =E`x+A+x+A`Ex`+AB` E T A A E B x A E B` E T B B A` E x` A B` E A x E` x T A =Bx+A+E+BE T B =Ex+A+x+A`Ex`+AB`E T A A E B x A E B E T B B A` E x` A B` E A x E x
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c- d- e- f- None of the above 6- Construct a 2048-to-1 multiplexer using several input multiplexers; 128-to-1 each, and one interfacing output multiplexer. i- The number of needed input multiplexers is; a- 4 b- 8 c- 16 d- 32 e- 64 f- None of the above ii- The size of the interfacing output multiplexer is: a- 4-to-1 b- 8-to-1 c- 16-to-1 d- 32-to-1 e- 64-to-1 f- None of the above = = T A =Bx+A+E+BE T B =Ex+A+x+A`Ex` T A A E B x A E B E T B B A` E x` A x E x T A =Bx+A`+E`+BE T B =E`x`+A+x+A`Ex T A A E B x A` E` B E T B B A` E x A x E` x` T A =Bx+B`E T B =E`x+ E x`+AE T A A E B x B` E T B B E x` A E E` x
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iii- The following represents block diagrams of all needed multiplexers. Label the input multiplexer lowest and highest selection switches, lowest and highest inputs and outputs. 7. Construct an 11-to-2048-line decoder with 7-to-128-line decoders with enable inputs and one interfacing input decoder i- Determine the required size of the interfacing input decoder.
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  • Spring '10
  • DR.WEEKS
  • Decimal

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