High voltage detect hvd 151 open drain configuration

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High-Voltage Detect (HVD) ....................................... 151 Open-Drain Configuration ......................................... 144 Parallel I/O (PIO) ....................................................... 143 Peripheral Pin Select (PPS) ...................................... 145 Slew Rate Selection .................................................. 145 Write/Read Timing .................................................... 144 In-Circuit Debugger ........................................................... 326 MPLAB ICD 3 ............................................................ 339 PICkit 3 Programmer ................................................ 339 In-Circuit Emulation ........................................................... 317 In-Circuit Serial Programming (ICSP) ....................... 317, 326 Input Capture .................................................................... 189 Control Registers ...................................................... 190 Input Change Notification (ICN) ........................................ 144 Instruction Addressing Modes ............................................ 74 File Register Instructions ............................................ 74 Fundamental Modes Supported ................................. 75 MAC Instructions ........................................................ 75 MCU Instructions ........................................................ 74 Move and Accumulator Instructions ........................... 75 Other Instructions ....................................................... 75 Instruction Set Overview ................................................................... 330 Summary .................................................................. 327 Symbols Used in Opcode ......................................... 328 Interfacing Program and Data Memory Spaces .................. 79 Inter-Integrated Circuit (I 2 C) ............................................. 229 Baud Rate Generator ............................................... 229 Control Registers ...................................................... 231 Inter-Integrated Circuit. See I 2 C. Internal LPRC Oscillator Use with WDT ........................................................... 325 Internet Address ............................................................... 493 Interrupt Controller Control and Status Registers .................................... 100 IECx .................................................................. 100 IFSx .................................................................. 100 INTCON1 .......................................................... 100 INTCON2 .......................................................... 100 INTCON3 .......................................................... 100 INTCON4 .......................................................... 100 INTTREG .......................................................... 100 IPCx .................................................................. 100 Reset Sequence ....................................................... 100 Interrupt Vector Table (IVT) ................................................ 95 Details ......................................................................... 98 M Memory Maps EDS ............................................................................ 72 Memory Organization ......................................................... 31 Microchip Internet Web Site .............................................. 493 Modulo Addressing ............................................................. 76 Applicability ................................................................. 77 Operation Example ..................................................... 76 Start and End Address ............................................... 76 W Address Register Selection .................................... 76 MPLAB PM3 Device Programmer .................................... 339 MPLAB REAL ICE In-Circuit Emulator System ................ 339 MPLAB X Integrated Development Environment Software .............................................. 337 MPLINK Object Linker/MPLIB Object Librarian ................ 338 O Op Amp/Comparator ......................................................... 301 Control Registers ...................................................... 303 Oscillator Configuration .................................................... 123 Bit Values for Clock Selection .................................. 125 CPU Clocking System .............................................. 124 Output Compare ............................................................... 193 Control Registers ...................................................... 194 P Packaging ......................................................................... 461 Details ....................................................................... 463 Marking ............................................................. 461, 462 Peripheral Module Disable (PMD) .................................... 135
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dsPIC33EVXXXGM00X/10X FAMILY DS70005144E-page 490 2013-2016 Microchip Technology Inc. Peripheral Pin Select (PPS) Control Registers ...................................................... 153 Input Sources, Maps Input to Function ..................... 147 Output Selection for Remappable Pins ..................... 150 Pinout I/O Descriptions (table) ............................................ 14 Power-Saving Features ..................................................... 133 Clock Frequency and Switching ................................ 133 Instruction-Based Modes .......................................... 133 Idle .................................................................... 134 Sleep ................................................................. 134 Interrupts Coincident with Power Save Instructions ........................................................ 134 Program Address Space ..................................................... 31 Construction ................................................................ 79 Data Access from Program Memory Using Table Instructions ................................................ 81 Memory Map for dsPIC33EV128GM00X/10X Devices ............................................................... 33 Memory Map for dsPIC33EV256GM00X/10X Devices ............................................................... 34 Memory Map for dsPIC33EV32GM00X/10X Devices ............................................................... 31 Memory Map for dsPIC33EV64GM00X/10X Devices ............................................................... 32 Table Read Instructions TBLRDH .............................................................. 81 TBLRDL .............................................................. 81 Program Memory Interrupt/Trap Vectors ................................................. 35 Organization ................................................................ 35 Reset Vector ............................................................... 35 Programmer’s Model Register Descriptions .................................................. 23 R Referenced Sources ........................................................... 12 Register Maps ADC1 .......................................................................... 46 CAN1 (WIN (C1CTRL) = 0 or 1) ................................. 47 CAN1 (WIN (C1CTRL) = 0) ......................................... 47 CAN1 (WIN (C1CTRL) = 1) ......................................... 48 Configuration Words ................................................. 318 CPU Core .................................................................... 41 CTMU .......................................................................... 46 DMAC ......................................................................... 59 DMT ............................................................................ 52 I2C1 ............................................................................ 44 Input Capture 1 through Input Capture 4 .................... 44 Interrupt Controller ...................................................... 55 NVM ............................................................................ 53 Op Amp/Comparator ................................................... 58 Output Compare ......................................................... 57 Peripheral Input Remap .............................................. 52 PMD ............................................................................ 54 PORTA for dsPIC33EVXXXGMX02 Devices .............. 63 PORTA for dsPIC33EVXXXGMX04 Devices .............. 62 PORTA for dsPIC33EVXXXGMX06 Devices .............. 62 PORTB for dsPIC33EVXXXGMX02 Devices .............. 64 PORTB for dsPIC33EVXXXGMX04 Devices .............. 64 PORTB for dsPIC33EVXXXGMX06 Devices .............. 63 PORTC for dsPIC33EVXXXGMX04 Devices ............. 65 PORTC for dsPIC33EVXXXGMX06 Devices ............. 65 PORTD for dsPIC33EVXXXGMX06 Devices ............. 66
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