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word(s) to continue with the process of obtaining the operand(s). 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 000 0 0 opcode0 0 0 0 0 src/dst reg Single-op Reg 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 000 0 1 opcodeaddr 0 0 addr modereg Single-op Mem15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 001 0 0 opcode 0 0 0 destsrc regreg Double-op Reg to Reg15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 001 0 1 opcode addr addrsrc moderegreg Double-op Reg to Mem 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 001 1 0 opcode addr dest addr moderegreg Double-op Mem to Reg15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 001 1 1 opcode addr dest src mode adr reg adr regDouble-op Mem to Mem
simple instructions all 32 bits widevery structured, no unnecessary baggageonly three instruction formatsrely on compiler to achieve performance— what are the compiler's goals?help compiler where we canop rs rt rd shamt functop rs rt 16 bit addressop 26 bit addressRIJOverview of MIPSISA-2
Instructions:bne $t4,$t5,LabelNext instruction is at Label if$t4!= $t5beq $t4,$t5,LabelNext instruction is at Label if $t4 = $t5j LabelNext instruction is at LabelFormats:Addresses are not 32 bits— How do we handle this with load and store instructions?oprsrt16 bit addressop26 bit addressIJAddresses in Branches and JumpsISA-3
Instructions:bne $t4,$t5,LabelNext instruction is at Label if $t4 != $t5beq $t4,$t5,LabelNext instruction is at Label if $t4 = $t5Formats:use Instruction Address Register (Relative to PC)most branches are local (principle of locality)Jump instructions just use high order bits of PCaddress boundaries of 256 MBoprsrt16 bit addressIAddresses in BranchesISA-4
To summarize:MIPS operandsNameExampleComments$s0-$s7, $t0-$t9, $zero,Fast locations for data. In MIPS, data must be in registers to perform 32 registers$a0-$a3, $v0-$v1, $gp,arithmetic. MIPS register $zero always equals 0. Register $at is $fp, $sp, $ra, $atreserved for the assembler to handle large constants.Memory[0],Accessed only by data transfer instructions. MIPS uses byte addresses, so230memoryMemory[4], ...,sequential words differ by 4. Memory holds data structures, such as arrays,wordsMemory[4294967292]and spilled registers, such as those saved on procedure calls.MIPS assembly languageCategoryInstructionExampleMeaningCommentsaddadd $s1, $s2, $s3 $s1 = $s2 + $s3Three operands; data in registersArithmetic subtractsub $s1, $s2, $s3 $s1 = $s2 - $s3Three operands; data in registersadd immediateaddi $s1, $s2, 100 $s1 = $s2 + 100Used to add constantsload wordlw $s1, 100($s2) $s1 = Memory[$s2+ 100]Word from memory to registerstore wordsw $s1, 100($s2)Memory[$s2+ 100] = $s1 Word from register to memoryData transfer load bytelb $s1, 100($s2) $s1 = Memory[$s2+ 100]Byte from memory to registerstore bytesb $s1, 100($s2)Memory[$s2+ 100] = $s1 Byte from register to memoryload upper immediatelui $s1, 100$s1 = 100 * 216Loads constant in upper 16 bitsbranch on equalbeq $s1, $s2, 25if ($s1 == $s2) go toPC + 4 + 100Equal test; PC-relative branchConditionalbranch on not equalbne $s1, $s2, 25if ($s1 != $s2) go toPC + 4 + 100Not equal test; PC-relativebranchset on less thanslt $s1, $s2, $s3if ($s2 < $s3) $s1= 1; else $s1 = 0Compare less than; for beq, bneset less than immediateslti $s1, $s2, 100if ($s2 < 100) $s1= 1; else $s1 = 0

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