3 I DDA18 includes current into V DD1A18 and V DD2A18 pins In order to realize

3 i dda18 includes current into v dd1a18 and v dd2a18

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(3) I DDA18 includes current into V DD1A18 and V DD2A18 pins. In order to realize the I DDA18 currents shown for IDLE, STANDBY, and HALT, clock to the ADC module must be turned off explicitly by writing to the PCLKCR0 register. (4) I DDA33 includes current into V DDA2 and V DDAIO pins. (5) The TYP numbers are applicable over room temperature and nominal voltage. MAX numbers are at 125°C, and MAX voltage (V DD = 2.0 V; V DDIO , V DD3VFL , V DDA = 3.6 V). (6) When the identical code is run off SARAM, I DD would increase as the code operates with zero wait states. (7) The following is done in a loop: Data is continuously transmitted out of the SCI-A, SCI-B, SPI-A, McBSP-A, and eCAN-A ports. Multiplication/addition operations are performed. Watchdog is reset. ADC is performing continuous conversion. Data from ADC is transferred to SARAM through the DMA. 32-bit read/write of the XINTF is performed. GPIO19 is toggled. (8) HALT mode I DD currents will increase with temperature in a non-linear fashion. (9) If a quartz crystal or ceramic resonator is used as the clock source, the HALT mode shuts down the internal oscillator. Copyright © 2007–2010, Texas Instruments Incorporated Electrical Specifications 119 Submit Documentation Feedback Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234 TMS320F28232
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TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 SPRS439H–JUNE 2007–REVISED MARCH 2010 6.4.1 Reducing Current Consumption The 2833x/2823x DSCs incorporate a method to reduce the device current consumption. Since each peripheral unit has an individual clock-enable bit, reduction in current consumption can be achieved by turning off the clock to any peripheral module that is not used in a given application. Furthermore, any one of the three low-power modes could be taken advantage of to reduce the current consumption even further. Table 6-3 indicates the typical reduction in current consumption achieved by turning off the clocks. Table 6-3. Typical Current Consumption by Various Peripherals (at 150 MHz) (1) PERIPHERAL I DD CURRENT MODULE REDUCTION/MODULE (mA) (2) ADC 8 (3) I2C 2.5 eQEP 5 ePWM 5 eCAP 2 SCI 5 SPI 4 eCAN 8 McBSP 7 CPU - Timer 2 XINTF 10 (4) DMA 10 FPU 15 (1) All peripheral clocks are disabled upon reset. Writing to/reading from peripheral registers is possible only after the peripheral clocks are turned on. (2) For peripherals with multiple instances, the current quoted is per module. For example, the 5 mA number quoted for ePWM is for one ePWM module. (3) This number represents the current drawn by the digital portion of the ADC module. Turning off the clock to the ADC module results in the elimination of the current drawn by the analog portion of the ADC (I DDA18 ) as well. (4) Operating the XINTF bus has a significant effect on IDDIO current. It will increase considerably based on the following: How many address/data pins toggle from one cycle to another How fast they toggle Whether 16-bit or 32-bit interface is used and The load on these pins.
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  • Serial Peripheral Interface Bus, Texas Instruments Incorporated, TMS320F28335

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