Interrupt fast but more complicated processor is notified by IO device

Interrupt fast but more complicated processor is

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Interrupt fast, but more complicated processor is notified by I/O device (interrupted) when device needs attention similar to a telephone with bells CSE – 341 : Microprocessors BRAC University
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Classifications of 8086 Interrupts 10 An 8086 interrupt can come from any of the three sources: An external signal applied to NMI or INTR pin. known as hardware interruption It is a user-defined interrupt Execution of interrupt instruction INT. referred as software interruption It is also a user-defined interrupt Some error condition produced by execution of an instruction, e.g., trying to divide some number by zero. It is known as pre-defined interrupt CSE – 341 : Microprocessors BRAC University
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Function of 8086 during Interrupts 11 At the end of each instruction cycle, 8086 checks to see if any interrupts have been requested. If yes, then 8086 responds to the interrupt by stepping through the following series of major actions: It decremented SP by 2 and pushes Flag register on the stack. It disables 8086 INTR input by clearing IF (Interrupt) flag in Flag register It resets the TF (Trap) flag in Flag register It decremented SP again by 2 and pushes current CS (Code Segment) contents on the stack. It decremented SP again by 2 and pushes current IP (Instruction Pointer) contents on the stack. It does an indirect far Jump to the start of the procedure written to respond to the interrupt. CSE – 341 : Microprocessors BRAC University
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Function of 8086 during Interrupts 12 1. Push FLAGS 2. Clear IF 3. Clear TF 4. Push CS 5. Push IP 6. Fetch ISR address main Program Interrupt Service Routine (ISR) PUSH registers ... ... ... .... ... POP registers IRET POP IP POP CS POP FLAGS CSE – 341 : Microprocessors BRAC University
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Interrupt Vectors and Vector Table 13 An interrupt vector is a pointer to where the ISR is stored in memory. All interrupts (vectored or otherwise) are mapped onto a memory area called the Interrupt Vector Table (IVT) . The IVT is usually located in the first 1 Kbyte of memory segment (from 00000 H - 003FF H). The purpose of the IVT is to hold the vectors that redirect the microprocessor to the right place when an interrupt arrives. The starting address of an ISR is often called the interrupt vector or the interrupt pointer. So the Table is referred to as interrupt-vector table or interrupt-pointer table. CSE – 341 : Microprocessors BRAC University
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Interrupt Types based on ISR ID 14 Note that The IP value is put in as the low word of the vector CS as high word of the vector 4 bytes are required to store the CS and IP values for each interrupt service procedure, the interrupt-vector table can hold starting addresses for up to 256 interrupt procedures.
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  • Spring '17
  • Dr. Jia uddin
  • Interrupt, BRAC University

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