135 x 03 17 x 11 04x06 09x025 06x015 065x02504 18x13

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1.35 x 0.3 + 1.7 x [1.1 + 0.4x0.6 + 0.9x0.25 + 0.6x0.15 + 0.65x(0.25+0.4)] + 1.8x1.3 + 2.75x2.0 = 11.75nJ/cyc x 2bcyc/sec = 23.5W c. [2 pts] Given your answer for (b), does your confidence scheme pass or fail the 3:1 rule of thumb discussed in lecture? Why or why not? Power savings = 7.7%, perf reduction is 3.57%, so it fails the 3:1 test.
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ECE/CS 752 Spring 2008 Midterm 2 -- Page 6 3. Modern Cache Coherence Protocols [15 pts] M I S E BR LW EV or BW EV or BW or BU LR/S LR/~S LW LW EV or BW Current State s Event and Local Coherence Controller Responses and Actions (s' refers to next state) Local Read (LR) Local Write (LW) Local Eviction (EV) Bus Read (BR) Bus Write (BW) Bus Upgrade (BU) Invalid (I) Issue bus read if no sharers then s ' = E else s ' = S Issue bus write s ' = M s ' = I Do nothing Do nothing Do nothing Shared (S) Do nothing Issue bus upgrade s ' = M s ' = I Respond shared s ' = I s ' = I Exclusive (E) Do nothing s ' = M s ' = I Respond shared s ' = S s ' = I Error Modified (M) Do nothing Do nothing Write data back; s ' = I Respond dirty; Write data back; s ' = S Respond dirty; Write data back; s ' = I Error Many modern systems use a MOESI cache coherence protocol, where the semantics of the additional O state are that the line is shared-dirty: i.e., multiple copies may exist, but the other copies are in S state, and the cache that has the line in O state is responsible for writing the line back if it is evicted. a. [2 pts] Explain what benefit accrues from the addition of O state to the MESI protocol. Can delay writing back the dirty line until it is evicted from the cache. This can also streamline directly providing the dirty line to the requesting processor, since there is no (slow) writeback involved. BR
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