1111 0011 111 001 101 01 0 001 111 111 001 101 010 1 7

1111 0011 111 001 101 01 0 001 111 111 001 101 010 1 7

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7F.35 16 = 0111 1111 . 0011 0101 = 0 01 111 111 . 001 101 01 0 = 001 111 111 . 001 101 010 = 1 7 7 . 1 5 2 8 4. [5 pts ea] Translate each of the following into ARM assembly: void f1(int32_t, int64_t, int64_t *) ; int32_t a32 ; int64_t b64, c64 ; ... f1(a32, b64, &c64) ; LDR LDRD ADR BL R0,a32 R1,R2,b64 R3,c64 f1 int64_t f2(void) { return (int64_t) -1 ; } f2: LDR MOV BX R0,=-1 R1,R0 LR int32_t f3(int32_t a32) { int32_t f4(int32_t) ; return a32 + f4(10) ; } F3: PUSH MOV LDR BL ADD POP {R4,LR} R4,R0 R0,=10 f4 R0,R0,R4 {R4,PC}
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NAME: ___________________________________ COEN 020 Final Exam (Part 1) Spring 2017 2 of 3 5. [5 pts ea] Translate each of the following into ARM assembly: int32_t *p32, k32 ; ... p32 = p32 + k32 ; LDR LDR ADD R0,p32 R1,k32 R0,R0,R1,LSL 2 STR R0,p32 int64_t a64[10] ; int32_t k32 ; ... a64[k32+1] = 0 ; LDR ADR LDR ADD R0,=0 R1,a64 R2,k32 R2,R2,1 STRD R0,R0,[R1,R2,LSL 3] int16_t *p16, a16[10] ; int32_t k32 ; ... k32 = p16 a16 ; LDR ADR SUB ASR R0,p16 R1,a16 R0,R0,R1 R0,R0,1 STR R0,k32 6. [5 pts] Assume s32 is a 32-bit signed integer and s64 is a 64-bit signed integer. Circle the code that correctly adds s32 to s64: LDRD LDR ADDS ADC STRD R0,R1,s64 R2,s32 R0,R0,R2 R1,R1,0 R0,R1,s64 LDRD LDR ADDS ADC STRD R0,R1,s64 R2,s32 R0,R0,R2 R1,R1,R2,ASR 31 R0,R1,s64 LDRD LDR ADDS ADC STRD R0,R1,s64 R2,s32 R0,R0,R2 R1,R1,-1,ASR 31 R0,R1,s64 7. [5 pts] True or False? If an ADDS instruction is used to add two 32-bit unsigned integers, the overflow flag (V) will be 1 if an overflow occurred. Answer: False (Unsigned overflow is indicated by C=1) 8. [5 pts] Which of the following signed double-length products would be an overflow condition if we were only going to keep the single-length product?
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