je L3 cmpl 1 eax jne L7 jmp L8 L3 movl ptr1 eax movzbl 3eax eax cmpb 13ebp al

Je l3 cmpl 1 eax jne l7 jmp l8 l3 movl ptr1 eax

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je.L3cmpl$1, %eaxjne.L7jmp.L8.L3:movlptr1, %eaxmovzbl3(%eax), %eaxcmpb-13(%ebp), %alje.L6callexplode_bombjmp.L6.L8:movlptr2, %eaxmovzbl2(%eax), %eaxcmpb-13(%ebp), %alje.L6callexplode_bombjmp.L6.L7:callexplode_bomb.L6:leaveret.globl ptr1.section.rodata.str1.1.LC1:.string "cs214".data.align 4.typeptr1, @object.sizeptr1, 4ptr1:###### some global variable here.long.LC17
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.globl ptr2######## some global variable here.section.rodata.str1.1LC2:.string "ee365".data.align 4.typeptr2, @object.sizeptr2, 4ptr2:.long.LC21. (2 points) How many inputs does the phase take? What are their types?2. (1+1+1 points) How many global pointers are present in this code? What are those? What do theypoint to?3. (5 points) How many inputs diffuse this phase? How did you deduce it?4. (15 Points) Enumerate the inputs that diffuse the phase?8
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Problem 4: Logic Design (20 points)1. (20 points) Design an FSM that detects the input stream encountered (when the input stream isintepreted as a unsigned binary representation of a number) is divisible by 2 with a non-zero quotient.Implement it using a combination of sequential and combinational logic. Clearly show your work.Draw the truth table for inputs, outputs and your states. Draw the K-map for everything. Clearlyindicate how many flip flops you are going to use.INPUT : 0 1 1 0 1 1 1 0 1 0....OUTPUT: 0 0 0 1 0 0 0 1 0 1....9
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Problem 5: Logic Design (15 points)1. (10 points) Consider the circuit given below with decoders and multiplexers. Identify the booleanexpression performed by the circuit.Draw the resultant circuit with simple gates (AND, OR andNOT). Show work for your result.01A01A01CYBC000110112:4 decoder2:1 multiplexer10
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2. (5 points) Calculate the boolean expression performed by the circuit given below.0011CAY0DB0110100001101101011
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