However if the voltage turn on is fast then cells become less stable An

However if the voltage turn on is fast then cells

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stability. However, if the voltage turn-on is fast, then cells become less stable. An attacker with access to the power channel could potentially control the stability of some of the SRAM PUF bits through this mechanism [12]. Recently, it has also been identified by Helfmeier et al. that the SRAM power-on state can be observed via near- infrared imaging of the SRAM during the turn-on tran- sient. Once the SRAM ‘‘fingerprint’’ has been measured (the PUF response bits have been stolen), one can use focused ion beam (FIB) techniques to modify a second IC to have a matching fingerprint as the first by cutting traces and/or demolishing transistors in the SRAM cell [10]. Finally, one notes that SRAM data are not erased im- mediately on power down. The data remain ‘‘stored’’ in the SRAM cell for a certain short time after the cell is powered down due to an effect called ‘‘data remanence.’’ Oren et al. have demonstrated that this effect can be used to inject faults into the SRAM PUF. In doing so, one can nonin- vasively learn the SRAM PUF output bits indirectly [28]. D. Ring-Oscillator PUF Implementation Yu and Devadas designed a delay-based weak PUF based on the ring-oscillator architecture, and proposed the first PUF key generation architecture that does not require traditional error correction [40]–[42]. The proposed index-based syndrome coding method is a departure from prior error-correction schemes based on code-offset syndrome [5], where the syndrome format enables soft- decision functionality without the complexities associated with an explicit traditional soft-decision error-correction decoder, which in general has a higher complexity than an equivalent hard-decision error-correction decoder. In this architecture, several oscillator PUF banks are instantiated, with each oscillator bank comprising 2 k ring oscillators. A k -bit challenge is applied to each bank, to determine which oscillators correspond to the top delays, and which oscillators correspond to the bottom delays. The top and bottom rows are summed to produce x and y , respectively. These values are used to produce a single bit PUF output and associated ‘‘soft-decision’’ information corresponding to a PUF challenge. Specifically, the output bit is the sign of x y . The ‘‘confidence’’ (discussed more in Section VI-D1) is derived from the magnitude of x y . Fig. 6 shows a simplified diagram for illustrative pur- poses. More complex ‘‘recombination’’ functions using xor s or amplitude modulation based on additional chal- lenge bits were used in actual implementation. Each of the oscillators is configured with ‘‘challenge bits.’’ For the purpose of cryptographic key generation, these bits are fixed (see the ‘‘fixed challenge’’ in Fig. 6) in order to reproduce the same key each time.
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