Registers l1 l2 cache memory disk tape etc memory bus

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Registers L1 L2 Cache Memory Disk, Tape, etc Memory Bus I/O Bus Faster Bigger D-Cache I-Cache Lecture Slides on Computer Arch & Assembly Lang ICS 233 @ Dr A R Naseer 26 Address, Data, and Control Bus Address Bus : unidirectional bus Memory address is put on address bus If memory address = a bits then 2 a locations are addressed Data Bus: bi-directional bus Data can be transferred in both directions on the data bus Control Bus Signals control transfer of data Read request Write request Done transfer Memory 0 1 2 3 2 a – 1 . . . read write done data bus address bus Processor d bits a bits Address Register Data Register Bus Control
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