Direct Memory Access Performed by a separate module on the system bus or

Direct memory access performed by a separate module

This preview shows page 5 - 7 out of 28 pages.

Direct Memory Access Performed by a separate module on the system bus or incorporated into an I/O module When the processor wishes to read or write data it issues a command to the DMA module containing: Whether a read or write is requested The address of the I/O device involved The starting location in memory to read/write The number of words to be read/written Transfers the entire block of data directly to and from memory without going through the processor. Processor is involved only at the beginning and end of the transfer. Processor executes more slowly during a transfer when processor access to the bus is required. More efficient than interrupt-driven or programmed I/O Labs - Cmd window commands: Winsat formal – runs the System Assessment Tool - DHCP (Dynamic Host Configuration Protocol) - A DHCP Server is a network server that automatically provides and assigns IP addresses, default gateways and other network parameters to client devices. It relies on the standard protocol known as Dynamic Host Configuration Protocol or DHCP to respond to broadcast queries by clients. - LSM (Local Session Manager) - The lsm.exe, Local Session Manager Service is a part of Windows operating system, included by Microsoft. lsm.exe process works in the collaboration of System Management task and its main function is to manage the connections related to servers on the hosted machines
Image of page 5
CSIS 2260 – Winter 2020 - SPOOLER - A program that controls spooling -- putting jobs on a queue and taking them off one at a time. Noteboo k 01.10 - Program Status Word (PSW) The Program Status Word or PSW is a collection of data 8 bytes (or 64 bits) long, maintained by the operating system. It keeps track of the current state of the system. program status word (PSW) A collection of information that encapsulates the basic execution state of a program at any instant. It permits an interrupted process to resume operation after the interrupt has been handled. - CPU Consists of: - PC – Progoram counter - IR – Instruction Register - MAR – Memory Address Register - MBR – Memory Buffer Register - I/OAR – input/output Address Register - I/OBR – Input/output Buffer Register Noteboo k 01.17 - The program counter is responsible for storing the next instruction - “Word” is what the CPU fetches from memory, it is stored in 16 bits - Registers are small pieces of memory that store data, they are almost as fast the CPU - Buffer is responsible for the rate mismatch - GPU (Graphics Processing Unit) divides the image in a grid, are used for deep learning and other fast software technologies, usually dealt in arrays, has a lot of the image rendering requirements that the CPU can’t handle or isn’t as fast. Can be used to mine crypto currency. - DSP is a specialized chip set that can be used to support encryption and security - Opcode: In computing, an opcode is the portion of a machine language instruction that specifies the operation to be performed.
Image of page 6
Image of page 7

You've reached the end of your free preview.

Want to read all 28 pages?

  • Spring '17
  • Rupa Manabala
  • Virtual memory, Central processing unit

  • Left Quote Icon

    Student Picture

  • Left Quote Icon

    Student Picture

  • Left Quote Icon

    Student Picture