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same source as the device in its normal operating mode without additional skews from the testequipment or test fixtures.To use this approach, additional on-chip controller circuitry is included to control the on-chipclocks in test mode. The on-chip clock control is then verified, and at-speed test patterns aregenerated which apply clocks through proper control sequences to the on-chip clock circuitryand test mode controls. DFT Compiler and TetraMAX ATPG support a comprehensive set offeatures to ensure that:lThe test mode control logic for the OCC operates correctly and has been connectedproperly.lTest mode clocks from the OCC circuitry can be efficiently used by TetraMAX ATPG for at-speed test generation.lOCC circuitry can operate asynchronously to shift and other clocks from the tester.OCC Definitions, Supported Flows,Supported PatternsNote the following definitions as they apply to OCC:lReference Clocks— The frequency reference to the PLL. It must be maintained as aconstantly pulsing and free-running oscillator or the circuitry will lose synchronization.lPLL Clocks— The output of the PLL. A free-running source that also runs at a constantfrequency which may or may not be the same as the reference clock.OCC Background6-2
TetraMAX ATPG User GuideH-2013.03-SP4lATE Clocks— Shifts the scan chain typically slower than a reference clock. You mustmanually add this signal (a port) when inserting the OCC. Note that the ATE clock cannotbe a reference clock, and it does not capture.lInternal Clocks— The OCC is responsible for gating and selecting the PLL clocks andATE clocks, and for creating the internal clocks, which satisfy ATPG requirements.lExternal Clocks— The primary inputs of a design which clock flip-flops directly throughcombinational logic not generated from PLLs.OCC is supported in the following flows:lDFT Compiler-to-TetraMAX flow (for details, please see Chapter 7, “Using On-ChipClocking,” in theDFT Compiler User Guide Vol. 1: Scan)lNon-DFT Compiler to TetraMAX Flows:lBasic Scan with On-Chip ClockinglAdaptive Scan with On-Chip ClockingNote the following pattern support available in OCC:FormatSynchronous Single PulseSynchronous Multi-PulseAsynchronousSTILYesYesYesSTIL99YesYesNoWGLYesYesNoOthersYesNoNoOCC LimitationsNote the following limitations for OCC support:lYou must use generic capture procedures for internal/external clocking. For moreinformation, see “CreatingGenericCaptureProcedures."lYou cannot use the OCC from DFT Compiler with theset_delay -launch_cyclelast_shiftcommand. However, you can use it with theset_delay -launch_cycle extra_shiftcommand if it is used in combination with pipelined scan enable.