When the peak output voltage is 100 V the PIV for each diode in a center tapped

# When the peak output voltage is 100 v the piv for

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20. When the peak output voltage is 100 V, the PIV for each diode in a center-tapped full-wave rectifier is (neglecting the diode drop) 22. The ideal dc output voltage of a capacitor-input filter is equal to 24. A 60 V peak full-wave rectified voltage is applied to a capacitor-input filter. If f= 120 Hz, RL= 10 kΩ, and C= 10µF, the ripple voltage is 26. Line regulation is determined by 28. A 10 V peak-to-peak sinusoidal voltage is applied across a silicon diode and series resistor. The maximum voltage across the diode is 30. In a certain positive clamper circuit, a 120 V rms sine wave is applied to the input. The dc value of the output is 32. If the input voltage tripler has an rms value of 12 V, the dc output voltage is approximately 34. When a silicon diode is open, a DMM will generally indicate 36. If one of the diodes in a bridge full-wave rectifier opens, the output is Problems 5. Determine whether each silicon diode in Figure 2-92 is forward biased or reverse biased. (a) (b) (c) (d) 6. Determine the voltage across each diode in Figure 2-92, assuming the practical model (a) (b) (c) (d) 7. Determine the voltage across each diode in Figure 2-92, assuming the ideal diode. (a) (b) (c) (d) 8. Determine the voltage across each diode in Figure 2-92, using the complete diode model with rd10Ωand rd= 100 MΩ = . (a) (b) (c) (d) • • • 