Ffh80h17fh carry out overflow it is large than the

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FFH+80H=17FH Carry out overflow It is large than the data range of 8-bit register. D6 D5 D4 D3 D2 D1 D7 D0 AC CY 1111 1111 1000 0000 0111 1111 1 Overflow CY=1
51 AC － Auxiliary Carry － If there is an carry from D3 to D4 during an operation, AC is set; otherwise AC is cleared. The AC flag is used by instructions that perform BCD (binary coded decimal) arithmetic. (See Chapter 6) 88+08 = 96 Auxiliary carry out overflow D6 D5 D4 D3 D2 D1 D7 D0 AC CY 1000 1000 0000 1000 1001 0000 Overflow AC=1 Add 6 and get the correct result Carry for the unit number Carry for the decimal number
52 OV － Overflow － (1/2) OV is set whenever the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit. (See Chapter 6) 2’s complement method is used in the signed numbers. The range of 8-bit number is –128 to 127 in decimal. In 8-bit signed number operations, OV is set to 1 if either of the following two conditions occurs: 1. There is a carry from D6 to D7 but no carry out of D7. 2. There is a carry from D7 out but no carry from D6 to D7.
53 OV － Overflow － (2/2) In the following example, there is an carry from D6 to D7 but no carry out of D7. Thus, the overflow bit is set. 40H + 40H = 80 H Overflow the range -80H to 7FH CY=0, OV=1, AC=0 D6 D5 D4 D3 D2 D1 D7 D0 AC CY 0100 0000 0100 0000 1000 0000 sign bit unsigned hex number the result = 80H = -128 in decimal wrong!
54 P － Parity Check － The parity flag reflects the number of 1s in the A ： accumulator ： register only. If A contains an odd number of 1s, then P=1. If A has an even number of 1s, then P=0. Example ： A = 0011 0011 # of 1s = 4 P = 0 A = 1011 0011 # of 1s = 5 P = 1
55 Example of CY, AC and OV Example 1 ： MOV A,#FFH ADD A,#03H A=FFH+03H=02H CY=1, AC=1, OV=1 1111 1111 0000 0011 0000 0010 CY=1, AC=1, OV=1 Example 2 ： MOV A,#41H ADD A,#4EH A=41H+4EH=8FH CY=0, AC=0, OV=1 0100 0001 0100 1110 1000 1111 CY=0, OV=1, AC=0 1
56 PSW － Program Status Word － Register The 8051 has a flag register PSW to indicate arithmetic conditions such as the carry bit. Carry flag ： CY ： ： PSW.7 Auxiliary carry flag ： AC ： ： PSW.6 Parity check ： P ： ： PSW.0 Overflow ： OV ： PSW.2 Register Bank Selector ： RS1, RS0 ： PSW.4, PSW.3 discuss later P -- OV RS0 RS1 F0 AC CY 7 6 5 4 3 2 1 0 PSW register
57 Figure 2-4. Bits of the PSW Register P -- OV RS0 RS1 F0 AC CY CY PSW.7 Carry flag. AC PSW.6 Auxiliary carry flag. -- PSW.5 Available to the user for general purpose. RS1 PSW.4 Register Bank selector bit 1. RS0 PSW.3 Register Bank selector bit 0. OV PSW.2 Overflow flag. -- PSW.1 User definable bit. P PSW.0 Parity flag. Set/cleared by hardware each instruction cycle to indicate an odd/even number of 1 bits in the accumulator. 7 6 5 4 3 2 1 0
58 Instructions and PSW Table 2-1 shows how the instructions affect flag bits. ADD affects CY, OV and AC. “MUL AB” affects OV and CY=0 (CY always equals 0). Multiple register A with register B. The result is placed in A and B where A has the lower byte and B has the higher byte.
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