Multivoltage Designs Design Compiler topographical mode supports the use of

Multivoltage designs design compiler topographical

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Multivoltage Designs Design Compiler topographical mode supports the use of multivoltage designs, multivoltage design features, and related commands. For multivoltage designs, the subdesign instances (blocks) operate at different voltages. To reduce power consumption, multivoltage designs typically make use of power domains. The blocks of a power domain can be powered up and down, independent of the power state of other power domains (except where a relative always-on relationship exists between two power domains). In particular, power domains can be defined and level shifter and isolation cells can be used as needed to adjust voltage differences between power domains and to isolate shut-down power domains. A power domain is defined as a logic grouping of one or more hierarchical blocks in a design that share the following: Primary voltage states or voltage range (that is, the same operating voltage) Power net hookup requirements Power-down control and acknowledge signals (if any) Power switching style Same process, voltage, and temperature (PVT) operating condition values (all cells of the power domain except level shifters) Same set or subset of nonlinear delay model (NLDM) target libraries Principal power domain commands are described in “Specifying Power Intent” on page 6-18 . Note: Power domains are not voltage areas. A power domain is a grouping of logic hierarchies, whereas the corresponding voltage area is a physical placement area into which the cells of the power domain’s hierarchies are placed. This correspondence is not automatic. You are responsible for correctly aligning the hierarchies to the voltage areas. You use the create_voltage_area command to set voltage areas.
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Chapter 10: Using Design Compiler Topographical Technology Multivoltage Designs 10-100 Design Compiler User Guide F-2011.09-SP2 Design Compiler User Guide Version F-2011.09-SP2 Because there are nets that cross power domains (connecting cells operating at different voltages) and because some power domains can be always-on (that is, never powered down) while others might be always-on relative to some specific power domain (requiring isolation) and still others shut down and power up independently (also requiring isolation), special cells are needed. In general, voltage differences are handled by level shifters, which connect drive and load pins operating at different voltages across the power domains. They are used to step up or step down the voltage from their input side to their output side. These cells are modeled either as simple buffers or as buffer cells with an enable pin. The first type of cell is referred to as a buffer-type level shifter and the second type as an enable-type level shifter. Enable-type level shifters are used when a power domain must be selectively shut down for some duration of the design’s operation.
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