EQEP2INT EQEP1INT eQEP2 eQEP1 0xD8E 0xD8C 0xD8A 0xD88 0xD86 0xD84 0xD82 0xD80

Eqep2int eqep1int eqep2 eqep1 0xd8e 0xd8c 0xd8a 0xd88

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EQEP2_INT EQEP1_INT - - - - - - (eQEP2) (eQEP1) 0xD8E 0xD8C 0xD8A 0xD88 0xD86 0xD84 0xD82 0xD80 INT6.y Reserved Reserved MXINTA MRINTA MXINTB MRINTB SPITXINTA SPIRXINTA (McBSP-A) (McBSP-A) (McBSP-B) (McBSP-B) (SPI-A) (SPI-A) 0xD9E 0xD9C 0xD9A 0xD98 0xD96 0xD94 0xD92 0xD90 INT7.y Reserved Reserved DINTCH6 DINTCH5 DINTCH4 DINTCH3 DINTCH2 DINTCH1 (DMA6) (DMA5) (DMA4) (DMA3) (DMA2) (DMA1) 0xDAE 0xDAC 0xDAA 0xDA8 0xDA6 0xDA4 0xDA2 0xDA0 INT8.y Reserved Reserved SCITXINTC SCIRXINTC Reserved Reserved I2CINT2A I2CINT1A - - (SCI-C) (SCI-C) - - (I2C-A) (I2C-A) 0xDBE 0xDBC 0xDBA 0xDB8 0xDB6 0xDB4 0xDB2 0xDB0 INT9.y ECAN1INTB ECAN0INTB ECAN1INTA ECAN0INTA SCITXINTB SCIRXINTB SCITXINTA SCIRXINTA (CAN-B) (CAN-B) (CAN-A) (CAN-A) (SCI-B) (SCI-B) (SCI-A) (SCI-A) 0xDCE 0xDCC 0xDCA 0xDC8 0xDC6 0xDC4 0xDC2 0xDC0 INT10.y Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved - - - - - - - - 0xDDE 0xDDC 0xDDA 0xDD8 0xDD6 0xDD4 0xDD2 0xDD0 INT11.y Reserved Reserved Reserved Reserved Reserved Reserved Reserved - - - - - - - - INT12.y LUF LVF Reserved XINT7 XINT6 XINT5 XINT4 XINT3 (FPU) (FPU) - Ext. Int. 7 Ext. Int. 6 Ext. Int. 5 Ext. Int. 4 Ext. Int. 3 SPRUFB0C–September 2007–Revised May 2009 Peripheral Interrupt Expansion (PIE) 133 Submit Documentation Feedback
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Interrupt Sources Table 6-4. PIE MUXed Peripheral Interrupt Vector Table (continued) INTx.8 INTx.7 INTx.6 INTx.5 INTx.4 INTx.3 INTx.2 INTx.1 0xDFE 0xDFC 0xDFA 0xDF8 0xDF6 0xDF4 0xDF2 0xDF0 Table 6-5. PIE Vector Table PIE Group Name VECTOR ID (1) Address (2) Size (x16) Description (3) CPU Priority Priority Reset 0 0x0000 0D00 2 Reset is always fetched from location 0x003F FFC0 in 1 - Boot ROM. (highest) INT1 1 0x0000 0D02 2 Not used. See PIE Group 1 5 - INT2 2 0x0000 0D04 2 Not used. See PIE Group 2 6 - INT3 3 0x0000 0D06 2 Not used. See PIE Group 3 7 - INT4 4 0x0000 0D08 2 Not used. See PIE Group 4 8 - INT5 5 0x0000 0D0A 2 Not used. See PIE Group 5 9 - INT6 6 0x0000 0D0C 2 Not used. See PIE Group 6 10 - INT7 7 0x0000 0D0E 2 Not used. See PIE Group 7 11 - INT8 8 0x0000 0D10 2 Not used. See PIE Group 8 12 - INT9 9 0x0000 0D12 2 Not used. See PIE Group 9 13 - INT10 10 0x0000 0D14 2 Not used. See PIE Group 10 14 - INT11 11 0x0000 0D16 2 Not used. See PIE Group 11 15 - INT12 12 0x0000 0D18 2 Not used. See PIE Group 12 16 - INT13 13 0x0000 0D1A 2 External Interrupt 13 (XINT13) or CPU-Timer1 17 - INT14 14 0x0000 0D1C 2 CPU-Timer2 18 - (for TI/RTOS use) DATALOG 15 0x0000 0D1E 2 CPU Data Logging Interrupt 19 (lowest) - RTOSINT 16 0x0000 0D20 2 CPU Real-Time OS Interrupt 4 - EMUINT 17 0x0000 0D22 2 CPU Emulation Interrupt 2 - NMI 18 0x0000 0D24 2 External Non-Maskable Interrupt 3 - ILLEGAL 19 0x0000 0D26 2 Illegal Operation - - USER1 20 0x0000 0D28 2 User-Defined Trap - - USER2 21 0x0000 0D2A 2 User Defined Trap - - USER3 22 0x0000 0D2C 2 User Defined Trap - - USER4 23 0x0000 0D2E 2 User Defined Trap - - USER5 24 0x0000 0D30 2 User Defined Trap - - (1) The VECTOR ID is used by DSP/BIOS. (2) Reset is always fetched from location 0x003F FFC0 in Boot ROM. (3) All the locations within the PIE vector table are EALLOW protected.
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