What are the cache hit rates of accessing arrays a b and c in the inner loop

# What are the cache hit rates of accessing arrays a b

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, in the inner loop iterations?SolutionCalculate the number of array elements that fit in a cache line. It is 64 bytes divided by 4 bytes, or16 elements. Now calculate the cache hit rate for every inner loop iteration. Array a suffers 1 miss forevery 16 array accesses (15/16 hit rate), b suffers 16 misses for 16 array accesses (0/16 hit rate).8 2. Now suppose your code looks as follows.for (k = 0; k < n; k++) {for (i = 0; i < n; i++) {r = a[i][k];for (j = 0; j < n; j++)c[i][j] += r*b[k][j];}}What are the cache hit rates of accessing arraysa,b, andc, in the inner loop iterations?SolutionCalculate the number of array elements that fit in a cache line. It is 64 bytes divided by 4 bytes, or 16elements. Now calculate the cache hit rate for every inner loop iteration. Array b suffers 1 miss for 16array accesses (15/16 hit rate), and c suffers 1 miss for 16 array accesses (15/16 hit rate).3. Now suppose your code looks as follows.sum = 0;struct Node*node = head;while (node->next) {sum = sum + node->sum;node = node->next;}Suppose thatNodeis 32 bytes and that cache lines are 64 bytes. What is the cache hit rate?SolutionIt is impossible to know how the linked list is allocated in memory. If successive nodes in the linkedlist are allocated adjacently in memory, the hit rate is 50%. If the nodes are allocated randomly, thehit rate is close to 0%.9 Question 10 (20 points)Suppose that we have a cache with the following organization.Size = 512 bytes.Line size = 64 bytes.Associativity = 4-way.Replacement policy = LRU.16-bit system.Now suppose that we execute the following code snippet:int array1;int array2;int copy (int i, int j) {array1[i][j] = array2[j][i];}Suppose that this copy code generates the following assembly code:copy:pushl%ebpmovl%esp, %ebppushl%ebxmovl8(%ebp), %ecxmovl12(%ebp), %ebxleal(%ecx, %ecx, 8), %edxsall\$2, %edxmovl%ebx, %eaxsall\$4, %eaxsubl%ebx, %eaxsall\$2, %eaxmovlarray2(%eax, %ecx, 4), %eaxmovl%eax, array1(%edx, %ebx, 4)popl%ebxmovl%ebp, %esppopl%ebpretFurthermore, assume the following register and label values:%ebp = 0x8000%esp = 0x4000array1 = 0x0000array2 = 0x0010Also assume that in this machine, pushing on the stack allows you to grow the stack tohigher addresses!Also, since this is a 16-bit system, a stack push puts 16 bits on the stack.10 1. The code snippet above contains 26 memory references.For each line of the assembly, indicate thenumber of memory references.Solutioncopy:%pushl%ebp2 refs - instruction + write to stack%movl%esp, %ebp1 ref - instruction%pushl%ebx2 refs - instruction + write to stack%movl8(%ebp), %ecx2 refs - instruction%+ read from memory in register%movl12(%ebp), %ebx2 refs - instruction%+ read from memory in register%leal(% ecx, %ecx, 8), %edx1 ref - instruction%sall\$2, %edx1 ref - instruction%movl%ebx, %eax1 ref - instruction%sall\$4, %eax1 ref - instruction%subl%ebx, %eax1 ref - instruction%sall\$2, %eax1 ref - instruction%movlarray2(%eax, %ecx, 4), %eax2 refs - instruction%+ read from memory in register%movl%eax, array1(%edx, %ebx, 4)2 refs - instruction%+ write to memory from register%popl%ebx2 refs - instruction%+ read from stack%movl%ebp, %esp1 ref - instruction%popl%ebp2 refs - instruction%+ read from stack%ret2 refs - instruction%+ read return address from stack2. Now suppose that the cache organization we presented caches only instruction references. Suppose also  • • • 