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CPU Registers:1.Stack Pointer: points to the top of the current stack in memory.2.PSW(Program Status Word): this register contains the condition code bits, which are set by comparison instructions. CPU mode.3.Program counter: contains the memory address of the next instruction to be fetched.4.MAR(Memory address register): address to the date to brought.5.MBR(Memory buffer register): holds current data6.I/O AR: address to next I/O device/module.7.I/O BR: data to be transferred.Many modern CPUs have facilities for executing more than one instruction at the same time. For example, a CPU might have separate fetch, decode, and execute units, so that
while it is executing instruction n, it could also be decoding instruction n + 1 and fetchinginstruction n + 2. Such an organization is called a pipelineMemory:1.second major component in any computer is the memory. 2.Memory Hierarchy:3.Cache: cache and caching is a concept rather than a specific device.4.Cache is mostly controlled by the hardware. 5.Main Memory is divided up into cache lines. (64 bytes)6.The most heavily lines are used cache lines are kept in a high-speed cache located inside or close to CPU. They are in L17.Recently used memory word are in L2.8.When the program needs to read a memory word, the cache hardware checks to see if the line needed is in the cache. If date found in cache, then it’s a cache hit. If data not found, then it’s a cache miss.9.Cache misses have to go to memory, with a substantial time penalty. 10. Hit Ratio: probability of finding desired data in cache. (a fraction b/w 0 & 1)11. EAT(Effective Access Time): average time to access a word from memoryI/O devices:1.I/O devices generally consists of two parts: a controller and the device itself. 2.Controller: is a chip or a set of chips that physically controls the device. It acceptscommands from the operating system, for example to read data from the device and carries them out. 3.Because each type of controller is different, different software is needed to control each one. The software that talks to a controller, giving it commands and
accepting responses, is called device driver. (device driver provides interface to OS)4.I/O can be done in 3 ways. (a)Constant Polling: CPU is heavily involved.-User program issues a system call, which the kernel then translates into procedure call to the appropriate driver. -The driver then starts the the I/O through controller and sits in a tight loop continuously polling the device.-The driver checks polling whether the I/o is done. -When the I/O has completed, the driver puts the data(if any) where they are needed and returns.-Once over, driver passes data to OS (involvement of CPU)(b) DMA(Direct memory access): does not need much CPU involved.