Because a must precede b and c must precede d there

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Because A must precede B and C must precede D, there are only 6 such inter- leavings: ABCD, ACBD, ACDB, CABD, CADB, CDAB. Manual inspection of all six possibilities completes the proof. A more illuminating approach is a proof by contradiction: Assume the assertion fails, meaning !(b>=a) . Then a==1 and b==0 . Since a==1 , line B happened before line C. Since (1) A must happen before B, (2) C must happen before D, and (3) “happens before” is a transitive relation, A must happen before D. But then b==1 and the assertion holds. There is nothing wrong with the proof except its assumption that we can reason in terms of “all possible interleavings” or that everything happens in certain orders. We can reason this way only if the program has no data races. 5 Partial Explanation of Why Data Races Are Disallowed To understand why one cannot always reason in terms of interleavings requires taking courses in compilers and/or computer architecture. Compilers typically perform optimizations to execute code faster without changing its meaning. If we required compilers to never change the possible interleavings, then it would be too difficult for compilers to be effective. Therefore, language definitions allow compilers to do things like execute line B above before line A. Now, in this simple example, there is no reason why the compiler would do this reordering. The point is that it is allowed to , and in more complicated examples with code containing loops and other features there are reasons to do so. Once such a reordering is allowed, the assertion is allowed to fail. Whether it will ever do so depends on exactly how a particular Java implementation works. Similarly, in hardware, there isn’t really one single shared memory containing a single copy of all data in the program. Instead there are various caches and buffers that let the processor access some memory faster than other memory. As a result, the hardware has to keep track of different copies of things and move things around. As it does so, memory operations might not become “visible” to other threads in the order they hap- pened in the program. As with compilers, requiring the hardware to expose all reads and writes in the exact order they happen is considered too onerous from a performance perspective. To be clear, compilers and hardware cannot just “do whatever they want.” All this re- ordering is completely hidden from you and you never need to worry about it if you avoid CPEN 221 – Fall 2016
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Bad Interleavings and Data Races 11 data races. This issue is irrelevant in single-threaded programming because with one thread you can never have a data race. 6 The Grand Compromise One way to summarize what we have just discussed is in terms of a “grand compromise” between programmers who want to be able to reason easily about what a program might do and compiler/hardware implementers who want to implement things efficiently and easily: • The programmer promises not to write data races.
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  • Fall '17
  • satish
  • Race condition, data races, bad interleavings

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